ZipRecruiter

Log In

1

Afternoon Ic Layout Engineer Jobs (NOW HIRING)

IC Enable

IC Layout Design Engineer

Richardson, TX · Hybrid

The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...

Skyworks

Sr. Principal IC Layout Designer

Greensboro, NC · On-site

$114K - $220K/yr

Sr. Principal IC Layout Designer Posting Start Date: 7/10/26 Job Location(s): Greensboro If you are ... Partner with senior analog/RFIC layout engineers to design cellular-band RFICs, including LNAs, RF ...

Saige Partners

Analog Layout Engineer

San Jose, CA · On-site

$100 - $110/hr

Senior High-Speed Mixed-Signal / Analog IC Layout Engineer (San Jose, CA) As an Analog Layout Engineer, you will be responsible for: Layout of Analog / High Speed transceiver circuit blocks such as ...

New

previous pagenext page

Showing results 21-40

All JobsAfternoon Ic Layout Engineer Jobs

Afternoon Ic Layout Engineer information

See salary details

$45K

$120.8K

$185.5K

How much do afternoon ic layout engineer jobs pay per year?

As of Aug 6, 2026, the average yearly pay for afternoon ic layout engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What is the difference between Afternoon Ic Layout Engineer vs Digital IC Design Engineer?

AspectAfternoon IC Layout EngineerDigital IC Design Engineer
Primary FocusPhysical layout and placement of integrated circuitsDesign and architecture of digital circuits and logic
Required SkillsEDA tools, layout optimization, fabrication process knowledgeHDL coding, circuit design, simulation
Work EnvironmentFoundries, semiconductor companies, EDA tool developmentDesign firms, semiconductor companies, research labs
Common CertificationsEDA tool proficiency, semiconductor manufacturing knowledgeVLSI design certifications, HDL proficiency

Afternoon IC Layout Engineers focus on the physical implementation of integrated circuits, ensuring optimal placement and routing. In contrast, Digital IC Design Engineers concentrate on designing the digital logic and architecture. Both roles require knowledge of semiconductor processes and often work closely in the chip development process, but their core responsibilities differ significantly.

More about Afternoon Ic Layout Engineer jobs
What cities are hiring for Afternoon Ic Layout Engineer jobs? Cities with the most Afternoon Ic Layout Engineer job openings:
What are the most commonly searched types of Ic Layout Engineer jobs? The most popular types of Ic Layout Engineer jobs are:
What states have the most Afternoon Ic Layout Engineer jobs? States with the most job openings for Afternoon Ic Layout Engineer jobs include:
What job categories do people searching Afternoon Ic Layout Engineer jobs look for? The top searched job categories for Afternoon Ic Layout Engineer jobs are:
Afternoon Ic Layout Engineer jobs near you
Infographic showing various Afternoon Ic Layout Engineer job openings in the United States as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $120,849 per year, or $58.1 per hour.

Senior IC Layout Designer (Remote - USA)

Encore Semi, Inc.

Clifton, NJ • Remote

$65 - $80/hr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 13 days ago

Job description

Senior IC Layout Designer (Remote – USA)
Employment Type: Full-Time (Hourly) | Contractor Opportunities Available
Compensation: Competitive Hourly Rate + Benefits + Bonus Opportunities
Work Authorization: US Citizen or Lawful Permanent Resident
Location: 100% Remote (Anywhere in the USA)
Build Next-Generation Silicon at Advanced Technology Nodes
We are looking for a Senior IC Layout Designer to join a highly skilled semiconductor engineering team developing advanced digital and mixed-signal integrated circuits. This role is ideal for an experienced layout professional who enjoys solving complex physical design challenges and turning innovative circuit designs into high-quality, production-ready silicon.
You will work closely with IC designers, verification engineers, and process teams to deliver layouts optimized for performance, power, area, reliability, and manufacturability across advanced process technologies.
What You’ll Do
  • Develop block-level and full-chip physical layouts for complex digital and mixed-signal IC designs.
  • Translate schematics into high-quality layout implementations while maintaining design intent.
  • Perform floorplanning, placement, routing, optimization, and layout refinement for PPA (Power, Performance, Area).
  • Drive DRC, LVS, and ERC closure, including debugging complex layout and verification issues.
  • Analyze and optimize layouts for parasitics, signal integrity, timing, and manufacturability.
  • Collaborate with circuit designers, physical verification teams, and foundry partners during tapeout and silicon release activities.
  • Support improvements in layout methodologies, automation, and design flows.
  • Mentor junior layout engineers and contribute technical expertise across the team.
What You Bring
  • 7+ years of hands-on IC layout design experience in advanced semiconductor technologies.
  • Strong expertise with industry-standard EDA tools such as Cadence Virtuoso, Synopsys tools, or equivalent platforms.
  • Deep understanding of CMOS process technology, physical design concepts, and layout best practices.
  • Proven experience achieving DRC/LVS closure and resolving complex physical verification challenges.
  • Strong knowledge of parasitic extraction, signal integrity, timing impact, and layout optimization techniques.
  • Experience collaborating within cross-functional semiconductor design teams.
Preferred Experience
  • Hands-on experience with FinFET and sub-7nm technology nodes.
  • Experience with high-speed digital, mixed-signal, or advanced SoC designs.
  • Familiarity with layout automation and scripting using SKILL, Python, TCL, or similar languages.
  • Track record supporting successful production tapeouts.
Why Join Us
Join a team working on challenging semiconductor designs where your layout expertise directly impacts silicon performance and product success. You’ll collaborate with experienced engineers tackling real-world challenges in advanced IC development.
If you are passionate about precision layout design, advanced nodes, and building world-class silicon, we would love to connect.
We offer a competitive hourly rate ranging from $65 to $80 per hour, based on experience, skills, and qualifications. The position includes a comprehensive benefits package and bonus opportunities
Full-Time Benefits:
• 15 days of PTO per calendar year
• 10 paid Holidays per calendar year
• Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
• Dental & Vision: Company covers 50% of premiums for Employee and Dependents
• Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
• Employee Assistant Program (EAP)
• 401k - Traditional & Roth
• Life/AD&D and Long-Term Disability
• Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
Follow on LinkedIn: https://www.linkedin.com/in/rtl2gds/