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Asic Design Verification Engineer Jobs (NOW HIRING)

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$165K - $241K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Influence ASIC architecture and design to enable robust verification and high-quality silicon ... Experience in scripting (Python, Perl) and C/C++ programming language. Preferred Qualifications

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$152K - $219K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center solutions. You'll architect and develop DV infrastructure, create ...

Cisco

Senior ASIC Design Verification Engineer

San Jose, CA

$167K - $245K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center, AI networking solutions. Join us to power the future of the digital world. Your ...

Nutanix

ASIC Design Verification Engineer

Santa Clara, CA · On-site

$107 - $161/hr

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

Cisco

ASIC Design Verification Engineer

San Jose, CA

$165K - $241K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

... engineering/related degree + 1 year of related experience. * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and tools.

SwiftCruit

ASIC Design Verification Engineer

Minneapolis, MN · On-site

$90 - $130/hr

  • Medical

  • Dental

  • Vision

  • PTO

As a technical member of Micron's ASIC Design Verification team, you will have a key role in ... Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or equivalent. * 2+ ...

K2 Space

Senior ASIC Design Verification Engineer

OR · On-site +1

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA · On-site +1

$114K/yr

Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...

Cisco

ASIC Design Verification Engineer

San Jose, CA

$152K - $219K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center solutions. You'll architect and develop DV infrastructure, create ...

Meta

ASIC Engineer, Design Verification

Austin, TX · On-site +1

$114K/yr

Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...

Cisco

Senior ASIC Design Verification Engineer

San Jose, CA · On-site

$167K - $245K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center, AI networking solutions. Join us to power the future of the digital world. Your ...

Socket.dev

ASIC Design Verification Engineer

Seattle, WA · On-site

$130 - $200/hr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

The Role We are seeking an ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...

Cisco

ASIC Design Verification Engineer

San Jose, CA

$165K - $241K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Influence ASIC architecture and design to enable robust verification and high-quality silicon ... Experience in scripting (Python, Perl) and C/C++ programming language. Preferred Qualifications

K2 Space

Principal ASIC Design Verification Engineer

Seattle, WA · On-site

$190K - $285K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

Apex Informatics

ASIC Design Verification Engineer

$139K - $169K/yr

Drive Design Verification to closure using defined verification metrics for test plans, functional ... Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or ...

K2 Space

Principal ASIC Design Verification Engineer

$190K - $285K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

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All JobsAsic Design Verification Engineer Jobs

ASIC Design Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do asic design verification engineer jobs pay per year?

As of Aug 16, 2026, the average yearly pay for asic design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What are some common challenges faced by an ASIC Design Verification Engineer, and how can they be overcome?

ASIC Design Verification Engineers often encounter challenges such as managing complex verification environments, ensuring thorough coverage, and keeping up with tight project deadlines. Debugging failures in large, intricate designs can be time-consuming and requires strong problem-solving skills. To overcome these challenges, engineers typically rely on robust verification methodologies (such as UVM), effective communication within cross-functional design teams, and continuous learning to stay updated with the latest verification tools and techniques. Collaboration with designers and regular code reviews also help in identifying and resolving issues early in the development cycle.

What are the key skills and qualifications needed to thrive as an ASIC Design Verification Engineer, and why are they important?

To thrive as an ASIC Design Verification Engineer, you need a solid understanding of digital design, verification methodologies (such as UVM or OVM), and a degree in electrical engineering or a related field. Familiarity with hardware description languages (like Verilog or VHDL), simulation tools (like ModelSim or VCS), and scripting languages (such as Python or Perl) is essential, along with experience using version control systems. Strong problem-solving skills, attention to detail, and effective communication are crucial for identifying design issues and collaborating with cross-functional teams. These skills ensure accurate verification, reduce time-to-market, and contribute to the delivery of reliable and high-performance ASIC products.

What does an ASIC Design Verification Engineer do?

An ASIC Design Verification Engineer is responsible for ensuring that application-specific integrated circuits (ASICs) function as intended before they are manufactured. They develop and implement verification plans, create testbenches, and run simulations to identify design errors. Their work involves using hardware description languages (HDLs) like Verilog or VHDL and tools such as UVM to systematically verify design functionality. This role is crucial for catching bugs early, reducing costly mistakes in silicon, and improving product reliability.

What is the difference between Asic Design Verification Engineer vs Asic Design Engineer?

AspectAsic Design Verification EngineerAsic Design Engineer
Primary FocusVerifying the functionality of ASIC designs through testing and simulationDesigning and developing ASIC hardware components and architecture
Skills & CertificationsKnowledge of verification tools, scripting, hardware description languages (HDL), and testing methodologiesProficiency in HDL, digital design, and circuit architecture
Work EnvironmentMostly in verification labs, simulation environments, and testing setupsDesign offices, hardware labs, and development teams
Industry UsageCommonly employed in semiconductor and electronics companies for testing ASICsUsed in chip design companies for creating hardware components

In summary, Asic Design Verification Engineers focus on testing and validating ASIC designs to ensure functionality, while Asic Design Engineers are responsible for creating and developing the ASIC hardware itself. Both roles require knowledge of HDL and are integral to the ASIC development process.

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ASIC Design Verification Engineer jobs near you
Infographic showing various Asic Design Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 1% Internship, 88% Full Time, 6% Part Time, and 5% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

ASIC Design Verification Engineer

Cisco

San Jose, CA • On-site

$165K - $241K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

This job post has expired today. Applications are no longer accepted.

Cisco Systems rating

8.0

Company rating: 8.0 out of 10

Based on 42 frontline employees who took The Breakroom Quiz

58th of 157 rated electronics manufacturers

Job description

The application window is expected to close on: 08/14/2026
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
Job Description
This role requires being onsite in San Jose, CA at least 4 days/week.
Meet the Team
The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms-like Silicon One-are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Your Impact
  • Set vision and strategy for ASIC verification methodology and execution across multiple programs and product lines.
  • Serve as technical authority and mentor for verification teams, fostering technical excellence and innovation.
  • Lead architecture and implementation of scalable, reusable verification infrastructure and methodologies.
  • Drive cross-functional initiatives to improve verification efficiency, quality, and coverage at scale.
  • Influence ASIC architecture and design to enable robust verification and high-quality silicon.
  • Serve as subject matter expert and advisor on industry trends, best practices, and new technologies.
  • Provide technical leadership in root cause analysis and resolution of complex issues during bring-up and post-silicon validation.

Minimum Qualifications
  • Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience.
  • Experience in System Verilog, UVM, and verification methodologies including emulation.
  • Experience architecting verification strategies for complex ASIC programs.
  • Experience leading verification teams or projects.
  • Experience in scripting (Python, Perl) and C/C++ programming language.

Preferred Qualifications
  • Experience in data center, Hyperscalers, or AI Networking technologies.
  • Author or contributor to industry standards or best practices in ASIC verification.
  • Deep expertise in multiple protocols and large-scale SoC architectures.
  • Experience with advanced emulation, prototyping, and formal verification tools at scale.
  • Experience with silicon bring-up and post-silicon debug.
  • Strong leadership, communication, and mentoring skills.

Why Cisco?
At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
The starting salary range posted for this position is $165,000.00 to $241,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:
  • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
  • 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
  • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
  • Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
  • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
  • Additional paid time away may be requested to deal with critical or emergency issues for family members
  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:
  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
  • 1.5% of incentive target for each 1% of attainment between 50% and 75%;
  • 1% of incentive target for each 1% of attainment between 75% and 100%; and
  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
The applicable full salary ranges for this position, by specific state, are listed below:
New York City Metro Area:
$165,000.00 - $277,600.00
Non-Metro New York state & Washington state:
$146,700.00 - $247,000.00
* For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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About Cisco Systems

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Cisco Systems, a global tech titan based in San Jose, CA, US, operates in the information technology and services industry. Founded in 1984, the company was derived from a project between two computer scientists from Stanford University. They aimed to connect different networks of computer systems at the university, resulting in the first multi-protocol router, and subsequently, the birth of Cisco. As an industry-leading manufacturer of networking hardware and telecommunications equipment, Cisco's product and services range includes routers, switches, firewall devices, and telecommunication technology. The company's mission, "to shape the future of the Internet by creating unprecedented value and opportunity for our customers, employees, investors, and ecosystem partners," is a testament to its pursuit of technology-forward innovation and customer satisfaction.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

San Jose, CA, US

Year founded

1984

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