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Vlsi Physical Design Engineer Jobs (NOW HIRING)

Ayar Labs

Engineer, Physical Design

San Jose, CA · On-site

$120K - $160K/yr

This is a growth-oriented role designed for an engineer with a strong foundation in VLSI who is eager to master the complete physical design flow, from synthesis to signoff. Essential Functions

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design ... Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts.

Apple

Physical Design Methodology CAD Engineer

Austin, TX · On-site

$126K - $190K/yr

We are looking for passionate engineers to join our team. In this role, you will be impacting a ... Preferred Qualifications Good understanding of VLSI / Physical Design basics through previous ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design ... Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts.

Apple

Physical Design Methodology CAD Engineer

Austin, TX · On-site

$126K - $190K/yr

We are looking for passionate engineers to join our team. In this role, you will be impacting a ... Preferred Qualifications Good understanding of VLSI / Physical Design basics through previous ...

Baya Systems

Physical Design Engineer

Santa Clara, CA

$159K - $164K/yr

Physical Design Engineer Location: Santa Clara, CA About the role: We are seeking a seasoned Physical Design Engineer with a strong background in all aspects of Physical Design and Implementation ...

Apple

Physical Design Engineer, Machine Learning

San Jose, CA · On-site

$159K - $164K/yr

Understanding of VLSI fundamentals, including physical design. Practical experience and knowledge ... Excellent programming skills in Python and C/C++.Master's or PhD with relevant publications in ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Beaverton, OR · On-site

$141K - $145K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Intel

CPU Core Physical Design Engineer

Folsom, CA

$105K - $200K/yr

The CPU Physical Design Engineer: * Performs physical design implementation of custom CPU designs ... in VLSI circuit design and synthesis. * 1+ yrs. of experience in Static timing analysis * 1+ yrs ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Beaverton, OR · On-site

$141K - $145K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

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All JobsVlsi Physical Design Engineer Jobs

Vlsi Physical Design Engineer information

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$95K

$141.5K

How much do vlsi physical design engineer jobs pay per year?

As of Jun 11, 2026, the average yearly pay for vlsi physical design engineer in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

Is VLSI design a good career?

VLSI physical design engineering is a promising career with high demand in semiconductor and electronics industries. It involves skills in CAD tools, circuit design, and layout optimization, offering opportunities for growth and specialization. The field requires continuous learning due to rapid technological advancements and industry standards.

What is a VLSI Physical Design Engineer job?

A VLSI Physical Design Engineer is responsible for transforming digital circuit designs into a physical layout that can be manufactured on silicon. They work on placement, routing, clock tree synthesis, timing closure, power optimization, and design rule checks. Their role ensures that the design meets performance, power, and area requirements while complying with fabrication constraints.

What are the key skills and qualifications needed to thrive in the Vlsi Physical Design Engineer position, and why are they important?

A VLSI Physical Design Engineer should have a strong background in electrical engineering, digital electronics, and deep knowledge of ASIC/FPGA design and physical design flow, generally supported by a relevant bachelor's or master's degree. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, as well as scripting skills in TCL, Perl, or Python is crucial, and certifications in VLSI design are a plus. Excellent problem-solving abilities, communication skills, and the ability to collaborate effectively with cross-functional teams are important soft skills. These competencies ensure the engineer can manage complex design challenges, optimize chip performance, and deliver high-quality results in fast-paced semiconductor environments.

Is VLSI a FPGA?

VLSI (Very-Large-Scale Integration) refers to the process of creating integrated circuits by combining thousands of transistors onto a single chip, which can include ASICs or other custom chips. FPGAs (Field-Programmable Gate Arrays) are a type of programmable logic device that can be configured after manufacturing, and while both are used in chip design, VLSI encompasses a broader range of integrated circuit development beyond FPGAs. VLSI engineers may work on designing, verifying, and implementing both ASICs and FPGA-based systems.

What is VLSI used for?

VLSI (Very Large Scale Integration) is used to design and manufacture integrated circuits with thousands to millions of transistors on a single chip. VLSI technology enables the development of complex electronic devices such as microprocessors, memory chips, and digital signal processors, which are essential in modern computing and electronic systems. VLSI physical design engineers work on optimizing chip layouts and ensuring manufacturability using CAD tools and industry standards.

Is VLSI very tough?

VLSI physical design engineering is a complex field that requires strong knowledge of electronics, circuit design, and CAD tools. It involves detailed tasks such as layout design, timing analysis, and verification, which can be challenging but are manageable with proper training and experience. Success in this role depends on technical skills, problem-solving ability, and continuous learning.

What are some typical challenges faced by VLSI Physical Design Engineers, and how can I prepare for them?

VLSI Physical Design Engineers often encounter challenges such as managing tight timing constraints, optimizing power and area, and addressing design rule violations during the layout process. You may also need to troubleshoot tool-related issues or coordinate with logic, verification, and manufacturing teams to meet project milestones. To prepare, it's helpful to strengthen your understanding of physical verification, develop scripting skills for process automation, and stay current with the latest advancements in EDA tools. Being proactive in cross-team communication and problem-solving will help you address these challenges effectively and contribute to successful silicon tapeouts.

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What cities are hiring for Vlsi Physical Design Engineer jobs? Cities with the most Vlsi Physical Design Engineer job openings:
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Vlsi Physical Design Engineer jobs near you
Infographic showing various Vlsi Physical Design Engineer job openings in the United States as of June 2026, with employment types broken down into 78% Full Time, 19% Part Time, and 3% Contract. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $139,408 per year, or $67 per hour.
Engineer, Physical Design

Engineer, Physical Design

Ayar Labs

San Jose, CA • On-site

$120K - $160K/yr

Full-time

Posted 20 days ago

Job description

Physical Design Engineer:
Location: San Jose (on-site)
Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models.
Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
We are seeking a collaborative Physical Design Engineer to join our high-performance ASIC/SoC team. In this role, you will contribute to the development of next-generation electro-optical engines and complex mixed-signal designs. You will work alongside technical leads to transform RTL into silicon-ready GDS, gaining exposure to leading-edge process nodes and advanced packaging technologies.
This is a growth-oriented role designed for an engineer with a strong foundation in VLSI who is eager to master the complete physical design flow, from synthesis to signoff.
Essential Functions
  • Block-Level Implementation: Execute the full physical design flow (RTL2GDS) for digital and mixed-signal blocks, including floorplanning, power planning, placement, and routing.
  • Timing Closure: Perform Static Timing Analysis (STA) to identify setup/hold violations and implement ECOs to achieve timing convergence.
  • Clock Tree Synthesis (CTS): Analyze clock structures and assist in optimizing clock distribution for skew and latency.
  • Physical Verification: Run and debug DRC, LVS, and Antenna checks using industry-standard verification tools to ensure manufacturing compliance.
  • Power Optimization: Participate in power optimization, including clock gating, power domain, and IR drop analysis.
  • Automation: Develop and maintain Tcl/Python scripts to automate standard design tasks and improve flow efficiency.
  • Cross-Functional Collaboration: Partner with the RTL design and Custom Layout teams to resolve integration issues and ensure clean hand-offs.

Basic Qualifications
  • Bachelor's degree in Electrical/Computer Engineering (or related field) with 2+ years of industry experience in physical design OR Master's degree in Electrical/Computer Engineering (or related field) with 0-2 years of industry experience.
  • Strong understanding of digital logic design and CMOS device physics.
  • Familiarity with the ASIC design cycle, including Synthesis, P&R, STA, and Signoff.
  • Hands-on experience (via work or academic projects) with industry-standard P&R tools (e.g., Cadence Innovus/Encounter, Synopsys ICC2/Fusion Compiler).
  • Proficiency in scripting languages (Tcl, Python, or Perl) for design automation and data parsing.
  • Comfortable working in a Linux/Unix environment.

Preferred Qualifications
  • Experience or coursework in Advanced Process Nodes (7nm, 5nm, or smaller).
  • Prior internship or co-op experience in a Physical Design or Hardware Engineering role.
  • Familiarity with physical verification tools such as Mentor Calibre or Synopsys IC Validator.
  • Understanding of low-power design standards (UPF/CPF).
  • Knowledge of timing constraints (SDC), or signal integrity analysis.
  • Experience with version control systems (e.g., Git, Perforce, Subversion).

Salary range: $120,000 - $160,000
NOTE TO RECRUITERS:
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don't send candidates to Ayar Labs, and do not contact our managers.
Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.

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