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Temporary Asic Rtl Design Engineer Jobs in Virginia

aui

FPGA Design Engineer

Charlottesville, VA · On-site

$90K - $126K/yr

The engineer will support the design and implementation of a new digital signal processing system ... Apply disciplined RTL design practices and sound synchronous design techniques, including ...

aui

FPGA Design Engineer

Charlottesville, VA · On-site

$90K - $126K/yr

The engineer will support the design and implementation of a new digital signal processing system ... Apply disciplined RTL design practices and sound synchronous design techniques, including ...

gaylor

Design Engineer

Richmond, VA

Design Engineer - Modular The Design Engineer plays a critical role in transforming virtual design ... Interpret and develop drawings for power, lighting, systems, underground, site, and temporary power ...

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Temporary Asic Rtl Design Engineer information

What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Rtl Design EngineerTemporary FPGA Design Engineer
Primary FocusDesigning RTL code for ASIC chipsDesigning FPGA logic and configurations
Skills & CertificationsVerilog/VHDL, ASIC design flow, simulation toolsVerilog/VHDL, FPGA development tools, synthesis
Work EnvironmentSemiconductor companies, ASIC design teamsFPGA development labs, prototyping environments
Industry UsageUsed in high-volume chip manufacturingUsed for prototyping, testing, and low-volume products

Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.

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Temporary Asic Rtl Design Engineer jobs near you
FPGA/ASIC Design Engineer with Security Clearance

FPGA/ASIC Design Engineer with Security Clearance

Indotronix International Corp

Herndon, VA • On-site

$115/hr

Contractor

Posted 3 days ago

Job description

Job Title: FPGA/ASIC Design Engineer
Location: Herndon, VA
Duration: 12 Months
Pay: $115/hr on W2
Active Secret Clearance Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key design team, responsible for the delivery of FPGAs for defense applications. S/he will architect, implement FPGA design, with hands on design/debug with primarily Ethernet, I2C, SPI, AXI protocols. L3Harris has state-of-the-art EDA flows/methodologies including Mentor EDA: Simulator Questa Prime, Verification IP (QVIPs), UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero/Quartus). We are a learning organization and have the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This is a high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Derive FPGA design specifications from system requirements
Develop detailed FPGA architecture for implementation
Implement design in RTL (VHDL) and perform module level simulations
Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA)
Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA
Generate verification test plans and perform End to End Simulations
Support Board, FPGA bring up
Validate design through HW/SW integration test with test equipment
Support product collateral for NSA certification Qualifications: Bachelor of Science (BS) -Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
3-5+ years’ experience designing FPGA products with VHDL
Experience with Xilinx FPGAs and Vivado
Experience with Revision control system
Experience with Earned Value Management (EVM)
Good written, verbal, and presentation skills
Active DoD Security Clearance Preferred Additional Skills: Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OS
Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult
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About Indotronix

Sourced by ZipRecruiter

In 1986, Indotronix established itself in the staffing space. 22 years later, Avani entered the scene, offering consulting and technology development. Finally, in 2016, the two joined forces to begin delivering talent across all areas, from Staffing to Consulting to unique platform development.

Industry

Recruiting and staffing services

Company size

1,001 - 5,000 Employees

Headquarters location

Rochester, NY, US

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