FPGA/ASIC Design Engineer Location: Herndon, VA Duration: 12 Months Pay: $115/hr on W2 Active ... design in RTL (VHDL) and perform module level simulations Perform Synthesis, Place and Route (PAR ...
FPGA/ASIC Design Engineer Location: Herndon, VA Duration: 12 Months Pay: $115/hr on W2 Active ... design in RTL (VHDL) and perform module level simulations Perform Synthesis, Place and Route (PAR ...
FPGA/ASIC Design Engineer (Secret) - Reston, VA - 5137
Reston, VA · On-site
$128K - $176.30K/yr
Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint) * Generate ... Experience with project leadership and EVM Reporting to the Manager, Engineering (ASIC/FPGA), the ...
FPGA/ASIC Design Engineer (Secret) - Reston, VA - 5137
Reston, VA · On-site
$128K - $176.30K/yr
Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint) * Generate ... Experience with project leadership and EVM Reporting to the Manager, Engineering (ASIC/FPGA), the ...
ASIC/FPGA Research Engineer - Digital Design
Arlington, VA · On-site
$107.20K - $140K/yr
The Engineer will work on a cutting-edge team to develop novel computer architectures, RTL models ... contractual stipulations, grant funding, as well as external market and organizational ...
ASIC/FPGA Research Engineer - Digital Design
Arlington, VA · On-site
$107.20K - $140K/yr
The Engineer will work on a cutting-edge team to develop novel computer architectures, RTL models ... contractual stipulations, grant funding, as well as external market and organizational ...
ASIC/FPGA Research Engineer - Digital Design
Arlington, VA · Hybrid
$107.20K - $140K/yr
The Engineer will work on a cutting-edge team to develop novel computer architectures, RTL models ... contractual stipulations, grant funding, as well as external market and organizational ...
ASIC/FPGA Research Engineer - Digital Design
Arlington, VA · Hybrid
$107.20K - $140K/yr
The Engineer will work on a cutting-edge team to develop novel computer architectures, RTL models ... contractual stipulations, grant funding, as well as external market and organizational ...
ASIC/FPGA Research Engineer - Digital Design
Arlington, VA · Hybrid
$107.20K - $140K/yr
The Engineer will work on a cutting-edge team to develop novel computer architectures, RTL models ... contractual stipulations, grant funding, as well as external market and organizational ...
ASIC/FPGA Research Engineer - Digital Design
Arlington, VA · Hybrid
$107.20K - $140K/yr
The Engineer will work on a cutting-edge team to develop novel computer architectures, RTL models ... contractual stipulations, grant funding, as well as external market and organizational ...
Electrical Engineer FPGA/ASIC - Level 3/4 - Dulles
Dulles, VA · On-site
$142.20K - $213.40K/yr
As a FPGA/ASIC Electrical Engineer - Level 3 or Level 4 located in Dulles, VA, you'll be a linchpin ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
Electrical Engineer FPGA/ASIC - Level 3/4 - Dulles
Dulles, VA · On-site
$142.20K - $213.40K/yr
As a FPGA/ASIC Electrical Engineer - Level 3 or Level 4 located in Dulles, VA, you'll be a linchpin ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
Electrical Engineer FPGA/ASIC - Level 3/4 - Dulles
Sterling, VA · On-site
$142.20K - $213.40K/yr
As a FPGA/ASIC Electrical Engineer - Level 3 or Level 4 located in Dulles, VA, you'll be a linchpin ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
Electrical Engineer FPGA/ASIC - Level 3/4 - Dulles
Sterling, VA · On-site
$142.20K - $213.40K/yr
As a FPGA/ASIC Electrical Engineer - Level 3 or Level 4 located in Dulles, VA, you'll be a linchpin ... Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place ...
Associate ASIC and/or FPGA Design and Verification Engineer
$125.70K - $173.30K/yr
Associate ASIC and/or FPGA Design and Verification Engineer Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification ...
Associate ASIC and/or FPGA Design and Verification Engineer
$125.70K - $173.30K/yr
Associate ASIC and/or FPGA Design and Verification Engineer Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification ...
Associate ASIC and/or FPGA Design and Verification Engineer
$125.70K - $173.30K/yr
Associate ASIC and/or FPGA Design and Verification Engineer Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification ...
Associate ASIC and/or FPGA Design and Verification Engineer
$125.70K - $173.30K/yr
Associate ASIC and/or FPGA Design and Verification Engineer Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification ...
Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog. * Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming ...
Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog. * Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming ...
Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog. * Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming ...
Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog. * Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming ...
FPGA Developer with Security Clearance
$141.70K - $195.30K/yr
We are seeking an experienced Senior FPGA Design Engineer with strong expertise in RTL development, SystemVerilog/VHDL, and Python to support high-speed networking and mission-critical systems in a ...
FPGA Developer with Security Clearance
$141.70K - $195.30K/yr
We are seeking an experienced Senior FPGA Design Engineer with strong expertise in RTL development, SystemVerilog/VHDL, and Python to support high-speed networking and mission-critical systems in a ...
Description As an Electrical Design Engineer, you will play a critical role in guiding the planning ... analyzing contractual obligations tied to the EoR. You will participate in risk assessment and ...
Description As an Electrical Design Engineer, you will play a critical role in guiding the planning ... analyzing contractual obligations tied to the EoR. You will participate in risk assessment and ...
Electrical Design Engineer
Chantilly, VA · On-site
... contractual obligations tied to the EoR. • You will participate in risk assessment and ... engineers, reinforcing consistent design practices and ensuring knowledge continuity across the ...
Electrical Design Engineer
Chantilly, VA · On-site
... contractual obligations tied to the EoR. • You will participate in risk assessment and ... engineers, reinforcing consistent design practices and ensuring knowledge continuity across the ...
Electrical Design Engineer
Chantilly, VA · On-site
... contractual obligations tied to the EoR. · You will participate in risk assessment and ... engineers, reinforcing consistent design practices and ensuring knowledge continuity across the ...
Quick apply
Electrical Design Engineer
Chantilly, VA · On-site
... contractual obligations tied to the EoR. · You will participate in risk assessment and ... engineers, reinforcing consistent design practices and ensuring knowledge continuity across the ...
Senior FPGA Design Engineer
Chantilly, VA · On-site
As a Senior FPGA Engineer, you will support the development of custom radio platforms for the ... Design high-speed FPGA RTL designs for satellite communication systems * Understand the hardware ...
Senior FPGA Design Engineer
Chantilly, VA · On-site
As a Senior FPGA Engineer, you will support the development of custom radio platforms for the ... Design high-speed FPGA RTL designs for satellite communication systems * Understand the hardware ...
Electrical Design Engineer
Chantilly, VA · On-site
... contractual obligations tied to the EoR. · You will participate in risk assessment and ... engineers, reinforcing consistent design practices and ensuring knowledge continuity across the ...
Quick apply
Electrical Design Engineer
Chantilly, VA · On-site
... contractual obligations tied to the EoR. · You will participate in risk assessment and ... engineers, reinforcing consistent design practices and ensuring knowledge continuity across the ...
Design Engineer - Physical Security
Mclean, VA · On-site
$85K - $100K/yr
Design Engineer CRI is looking to hire a Design Engineer in the Washington DC, Virginia, Maryland ... Occasional on-site project observations and reviews; duties needed to fulfill contractual ...
Design Engineer - Physical Security
Mclean, VA · On-site
$85K - $100K/yr
Design Engineer CRI is looking to hire a Design Engineer in the Washington DC, Virginia, Maryland ... Occasional on-site project observations and reviews; duties needed to fulfill contractual ...
... engineers to oversee board bring-up. Candidates should be comfortable working in both a design and ... Firmware: Collaborate closely with RTL teams to define pinouts, bank voltages, and clocking ...
... engineers to oversee board bring-up. Candidates should be comfortable working in both a design and ... Firmware: Collaborate closely with RTL teams to define pinouts, bank voltages, and clocking ...
... engineers, scientists, etc) to design, develop, simulate, and integrate challenging DSP FPGA ... RTL and incorporate client feedback into firmware revisions. This role will also support ...
... engineers, scientists, etc) to design, develop, simulate, and integrate challenging DSP FPGA ... RTL and incorporate client feedback into firmware revisions. This role will also support ...
Contractual Asic Rtl Design Engineer information
What is the difference between Contractual Asic Rtl Design Engineer vs Digital IC Design Engineer?
| Aspect | Contractual Asic Rtl Design Engineer | Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering | Bachelor's/Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Contract-based, project-specific, often in semiconductor or tech companies | Full-time or contract, working on digital integrated circuit design |
| Industry Usage | Common in semiconductor, electronics, and tech firms for ASIC development | Used across semiconductor, consumer electronics, and communication industries |
Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Virginia? The most popular types of Asic Rtl Design Engineer jobs in Virginia are:
What are popular job titles related to Contractual Asic Rtl Design Engineer jobs in Virginia? For Contractual Asic Rtl Design Engineer jobs in Virginia, the most frequently searched job titles are:
What job categories do people searching Contractual Asic Rtl Design Engineer jobs in Virginia look for? The top searched job categories for Contractual Asic Rtl Design Engineer jobs in Virginia are:
What cities in Virginia are hiring for Contractual Asic Rtl Design Engineer jobs? Cities in Virginia with the most Contractual Asic Rtl Design Engineer job openings:
$115/hr
Contractor
Posted 13 days ago
Job description
Job Title: FPGA/ASIC Design Engineer
Location: Herndon, VA
Duration: 12 Months
Pay: $115/hr on W2
Active Secret Clearance Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key design team, responsible for the delivery of FPGAs for defense applications. S/he will architect, implement FPGA design, with hands on design/debug with primarily Ethernet, I2C, SPI, AXI protocols. L3Harris has state-of-the-art EDA flows/methodologies including Mentor EDA: Simulator Questa Prime, Verification IP (QVIPs), UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero/Quartus). We are a learning organization and have the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This is a high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Derive FPGA design specifications from system requirements
Develop detailed FPGA architecture for implementation
Implement design in RTL (VHDL) and perform module level simulations
Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA)
Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA
Generate verification test plans and perform End to End Simulations
Support Board, FPGA bring up
Validate design through HW/SW integration test with test equipment
Support product collateral for NSA certification Qualifications: Bachelor of Science (BS) -Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
3-5+ years’ experience designing FPGA products with VHDL
Experience with Xilinx FPGAs and Vivado
Experience with Revision control system
Experience with Earned Value Management (EVM)
Good written, verbal, and presentation skills
Active DoD Security Clearance Preferred Additional Skills: Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OS
Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult
Location: Herndon, VA
Duration: 12 Months
Pay: $115/hr on W2
Active Secret Clearance Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key design team, responsible for the delivery of FPGAs for defense applications. S/he will architect, implement FPGA design, with hands on design/debug with primarily Ethernet, I2C, SPI, AXI protocols. L3Harris has state-of-the-art EDA flows/methodologies including Mentor EDA: Simulator Questa Prime, Verification IP (QVIPs), UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero/Quartus). We are a learning organization and have the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This is a high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Derive FPGA design specifications from system requirements
Develop detailed FPGA architecture for implementation
Implement design in RTL (VHDL) and perform module level simulations
Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA)
Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA
Generate verification test plans and perform End to End Simulations
Support Board, FPGA bring up
Validate design through HW/SW integration test with test equipment
Support product collateral for NSA certification Qualifications: Bachelor of Science (BS) -Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
3-5+ years’ experience designing FPGA products with VHDL
Experience with Xilinx FPGAs and Vivado
Experience with Revision control system
Experience with Earned Value Management (EVM)
Good written, verbal, and presentation skills
Active DoD Security Clearance Preferred Additional Skills: Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OS
Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult
About Indotronix Avani Group
Sourced by ZipRecruiter
In 1986, Indotronix established itself in the staffing space. 22 years later, Avani entered the scene, offering consulting and technology development. Finally, in 2016, the two joined forces to begin delivering talent across all areas, from Staffing to Consulting to unique platform development.
Industry
Recruiting and staffing services
Company size
1,001 - 5,000 Employees
Headquarters location
Rochester, NY, US
Year founded
1986