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Tapeout Design Engineer Jobs in Florida (NOW HIRING)

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Tapeout Design Engineer information

What are the key skills and qualifications needed to thrive as a tapeout design engineer?

To thrive as a Tapeout Design Engineer, you need a solid background in semiconductor physics, digital/analog circuit design, and a relevant engineering degree. Proficiency with EDA tools such as Cadence, Synopsys, and experience with physical verification, DRC/LVS checks, and scripting languages like Python or TCL are typically required. Strong attention to detail, problem-solving skills, and effective communication are valuable soft skills in this role. These skills and qualities are crucial for ensuring error-free silicon fabrication, efficient workflow, and successful collaboration across engineering teams.

What is a tapeout design engineer?

Tapeout Design Engineers are professionals responsible for finalizing the layout and design of integrated circuits (ICs) before manufacturing. They ensure that all design specifications are met, and that the chip layout is error-free and ready for fabrication. Their work involves collaborating with design, verification, and foundry teams to deliver a manufacturable design, often using tools for physical verification, design rule checking, and layout-versus-schematic checks. This role is critical in the semiconductor industry, as any errors at tapeout can result in costly manufacturing delays. Tapeout Design Engineers play a key role in bringing new microchips from concept to production.

What is the difference between Tapeout Design Engineer vs ASIC Design Engineer?

AspectTapeout Design EngineerASIC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or related field; knowledge of EDA toolsBachelor's or Master's in Electrical Engineering or related field; strong digital design skills
Work EnvironmentSemiconductor companies, chip design firms, EDA tool providersSemiconductor companies, integrated circuit design firms
Industry UsageFocuses on final chip layout and manufacturing readinessDesigns the digital architecture and logic of chips

While both roles require a background in electrical engineering and familiarity with EDA tools, a Tapeout Design Engineer specializes in preparing the final chip layout for manufacturing, ensuring design rules are met. An ASIC Design Engineer focuses on creating the digital logic and architecture of integrated circuits. The roles often collaborate but differ mainly in their stage of the design process and specific responsibilities.

What are some common challenges tapeout design engineers face during the tapeout process, and how can they be addressed?

Tapeout Design Engineers often encounter tight deadlines, last-minute design changes, and the need to coordinate between multiple teams such as layout, verification, and fabrication. Addressing these challenges typically involves proactive communication, thorough planning, and the use of automated verification tools to catch errors early. Effective collaboration and robust documentation help ensure that any issues are quickly identified and resolved, minimizing the risk of costly delays or rework in the fabrication stage.
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Tapeout Design Engineer jobs near you
Infographic showing various Tapeout Design Engineer job openings in Florida as of August 2026, with employment types broken down into 1% Internship, 86% Full Time, 8% Part Time, and 5% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution.

Sr High-Speed SerDes Design Engineer (Remote)

Encore Semi, Inc.

Melbourne, FL • Remote

$135K - $165K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 4 days ago

Job description

Sr High-Speed SerDes Design Engineer (Remote)
Full-Time: Competitive Salary + Benefits + Bonuses | Contractor Opportunities Available
Work Authorization: US Citizen or Lawful Permanent Resident
Location: 100% Remote (Anywhere in the USA)
We are looking for a Sr High-Speed SerDes Design Engineer who enjoys solving some of the toughest challenges in analog/mixed-signal IC design. If you have hands-on experience designing high-speed SerDes, PLLs, TX/RX data paths, and have worked through the realities of advanced process nodes (5nm and below), we would love to connect.
You will be part of a highly skilled engineering team developing next-generation high-performance silicon where speed, power, jitter, and reliability matter.
Required Qualifications
BS, MS, or PhD in Electrical Engineering or a related discipline.
8+ years of hands-on analog/mixed-signal IC design experience.
Strong expertise in the design of High-Speed SerDes, including PLLs, TX/RX circuits, CDRs, clock generation, and high-speed analog interfaces.
Proven transistor-level circuit design experience from architecture through silicon validation.
Successful tapeout experience in advanced CMOS process technologies (FinFET and 5nm beyond preferred).
Experience working with one or more leading semiconductor foundries.
Proficiency with industry-standard analog and mixed-signal IC design, simulation, verification, and physical verification EDA tools.
Strong understanding of signal integrity, jitter analysis, power optimization, and high-speed circuit design techniques.
Preferred Qualifications
Experience with silicon bring-up, characterization, and post-silicon debug.
Familiarity with high-speed interface standards such as PCIe, Ethernet, CXL, USB, MIPI, DDR, HBM, UCIe, or similar protocols.
Experience collaborating with cross-functional teams including Layout, Digital Design, Physical Design, Verification, Packaging, Test, and Systems Engineering.
Excellent problem-solving, communication, and technical leadership skills.
Experience mentoring junior engineers and leading technical initiatives.
Why Join Us
Work on challenging, high-impact silicon designs with a team of engineers who are passionate about pushing the limits of performance and innovation.
If you have designed SerDes at the transistor level and want to work on genuinely hard problems, we’d love to hear from you.
The anticipated annual base salary for this position is between $135,000 to $165,000, which also includes a comprehensive benefits package.
Full-Time Benefits:
• 15 days of PTO per calendar year
• 10 paid Holidays per calendar year
• Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
• Dental & Vision: Company covers 50% of premiums for Employee and Dependents
• Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
• Employee Assistant Program (EAP)
• 401k - Traditional & Roth
• Life/AD&D and Long-Term Disability
• Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
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