Calabasas, CA · On-site
$114K - $191K/yr
As a Hardware Design Engineer, you will contribute and drive the design, development, qualification ... High density FPGAs, Network processors, DDR3/DDR4 discrete designs, SRAM, PHYs, and retimers.
Calabasas, CA · On-site
$114K - $191K/yr
As a Hardware Design Engineer, you will contribute and drive the design, development, qualification ... High density FPGAs, Network processors, DDR3/DDR4 discrete designs, SRAM, PHYs, and retimers.
$147K - $272K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$147K - $272K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
Boise, ID · On-site
Exposure to memory design (DRAM, NAND, SRAM) or high-speed circuit design * Experience with layout tools and physical design methodologies * Knowledge of scripting or programming (e.g., Python, TCL ...
Boise, ID · On-site
Exposure to memory design (DRAM, NAND, SRAM) or high-speed circuit design * Experience with layout tools and physical design methodologies * Knowledge of scripting or programming (e.g., Python, TCL ...
$114K - $191K/yr
As a Hardware Design Engineer, you will contribute and drive the design, development, qualification ... High density FPGAs, Network processors, DDR3/DDR4 discrete designs, SRAM, PHYs, and retimers.
$114K - $191K/yr
As a Hardware Design Engineer, you will contribute and drive the design, development, qualification ... High density FPGAs, Network processors, DDR3/DDR4 discrete designs, SRAM, PHYs, and retimers.
Boise, ID · On-site
Exposure to memory design (DRAM, NAND, SRAM) or high-speed circuit design * Experience with layout tools and physical design methodologies * Knowledge of scripting or programming (e.g., Python, TCL ...
Boise, ID · On-site
Exposure to memory design (DRAM, NAND, SRAM) or high-speed circuit design * Experience with layout tools and physical design methodologies * Knowledge of scripting or programming (e.g., Python, TCL ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$181K - $318K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$147K - $272K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$147K - $272K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
Durham, NC · On-site
$147K - $220K/yr
You will work on transistor-level design for SRAM arrays/caches, register files, and/or custom ... Electrical or Computer Engineering - Bachelor's degree & 5 years of related experience; or MS ...
Durham, NC · On-site
$147K - $220K/yr
You will work on transistor-level design for SRAM arrays/caches, register files, and/or custom ... Electrical or Computer Engineering - Bachelor's degree & 5 years of related experience; or MS ...
$123K - $127K/yr
Collaborate with the Architect, Front End Design, and CAD teams to deliver best-in-class designs. Assist Front End Design and Integration Engineers with SRAM/RF specification and synthesis design ...
$123K - $127K/yr
Collaborate with the Architect, Front End Design, and CAD teams to deliver best-in-class designs. Assist Front End Design and Integration Engineers with SRAM/RF specification and synthesis design ...
Richardson, TX · On-site
$123K - $127K/yr
Collaborate with the Architect, Front End Design, and CAD teams to deliver best-in-class designs. Assist Front End Design and Integration Engineers with SRAM/RF specification and synthesis design ...
Richardson, TX · On-site
$123K - $127K/yr
Collaborate with the Architect, Front End Design, and CAD teams to deliver best-in-class designs. Assist Front End Design and Integration Engineers with SRAM/RF specification and synthesis design ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Cary, IL · On-site
$136K - $253K/yr
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational ... Detailed knowledge about industry standard interfaces such as PCI Express, DDR, LPDDR, SRAM, UCIe ...
Cary, IL · On-site
$136K - $253K/yr
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational ... Detailed knowledge about industry standard interfaces such as PCI Express, DDR, LPDDR, SRAM, UCIe ...
$18.03 - $23.08
1% of jobs
$23.08 - $28.13
2% of jobs
$28.13 - $33.17
7% of jobs
$33.17 - $38.22
11% of jobs
$39.68 is the 25th percentile. Wages below this are outliers.
$38.22 - $43.27
14% of jobs
$43.27 - $48.32
15% of jobs
The median wage is $48.51 / hr.
$48.32 - $53.37
14% of jobs
$53.37 - $58.41
8% of jobs
$59.90 is the 75th percentile. Wages above this are outliers.
$58.41 - $63.46
12% of jobs
$63.46 - $68.51
12% of jobs
$68.51 - $73.56
5% of jobs
$18
$50
$73
To thrive as a Sram Design Engineer, a strong background in electrical engineering, VLSI design, and semiconductor device physics—often supported by a relevant bachelor’s or master’s degree—is essential. Expertise in industry-standard EDA tools like Cadence, Synopsys, and Mentor Graphics, as well as experience with HDL languages such as Verilog or VHDL, is typically required. Attention to detail, problem-solving skills, and the ability to communicate effectively with cross-functional teams are important soft skills for the role. These skills ensure high-quality SRAM design, efficient collaboration, and the ability to meet both performance and reliability targets in advanced integrated circuits.
As a Sram Design Engineer, your daily tasks often include designing and verifying static random-access memory (SRAM) circuits, running simulations to validate performance, and troubleshooting design issues. You’ll collaborate closely with layout engineers, verification teams, and other design engineers to optimize memory architectures and ensure compliance with power, area, and timing specifications. Additionally, you may attend design reviews, document design methodologies, and interact with foundries during tape-out or silicon validation phases. This role frequently involves both independent technical work and teamwork within a multidisciplinary environment focused on delivering high-performance semiconductor products.
An SRAM Design Engineer is responsible for designing Static Random-Access Memory (SRAM) circuits used in semiconductor chips. They focus on optimizing performance, power consumption, and area efficiency while ensuring reliable functionality. Their work includes transistor-level design, layout, simulation, and verification of SRAM cells, sense amplifiers, and peripheral circuits. They collaborate with process engineers and digital designers to integrate SRAM into larger systems. Strong knowledge of VLSI design, circuit theory, and semiconductor technology is essential for this role.
$114K - $191K/yr
Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Posted 28 days ago
8.1
Based on 20 frontline employees who took The Breakroom Quiz
41st of 139 rated electronics manufacturers
Get the full story on Breakroom
Sourced by ZipRecruiter
Electrical equipment, appliance, and component manufacturing
10,000+ Employees
Santa Rosa, CA, US
1937
