Role and Responsibilities As a Senior Staff Memory/SRAM Circuit Design Engineer, you will help drive the development of high-performance, power- and area-efficient SRAM and custom memory macros that ...
Role and Responsibilities As a Senior Staff Memory/SRAM Circuit Design Engineer, you will help drive the development of high-performance, power- and area-efficient SRAM and custom memory macros that ...
Memory Design Engineer
Troy, MI · On-site
Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. * Exposure to full embedded memory design flow: Architecture, circuit design, physical ...
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Memory Design Engineer
Troy, MI · On-site
Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations. * Exposure to full embedded memory design flow: Architecture, circuit design, physical ...
Principal Circuit Design Engineer
Raleigh, NC · On-site
$188K - $304K/yr
Responsibilities * Collaborate with SoC designers to develop Memory SRAM and Register file ... design value propositions and risks. * Effective debug skills. #SCHIE Silicon Engineering IC5 - The ...
Principal Circuit Design Engineer
Raleigh, NC · On-site
$188K - $304K/yr
Responsibilities * Collaborate with SoC designers to develop Memory SRAM and Register file ... design value propositions and risks. * Effective debug skills. #SCHIE Silicon Engineering IC5 - The ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition ... Master of Science degree in Electrical Engineering or related degree * 10 + years of relevant ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition ... Master of Science degree in Electrical Engineering or related degree * 10 + years of relevant ...
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition ... Engineer your future. We empower our employees to truly own their career and development. Come ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition ... Engineer your future. We empower our employees to truly own their career and development. Come ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition ... Master of Science degree in Electrical Engineering or related degree * 10 + years of relevant ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition ... Master of Science degree in Electrical Engineering or related degree * 10 + years of relevant ...
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... with SRAM design is also a plus * Hands-on experience with NVM test chip design, bring-up, and ...
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... with SRAM design is also a plus * Hands-on experience with NVM test chip design, bring-up, and ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
Custom Circuits Design Engineer
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
Custom Circuits Design Engineer
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
Custom Circuits Design Engineer
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
Custom Circuits Design Engineer
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
Work closely with other engineering teams, such as analog and digital, to ensure seamless ... SRAM, DRAM, Flash or emerging NVM technologies * Strong understanding of layout design including ...
Work closely with other engineering teams, such as analog and digital, to ensure seamless ... SRAM, DRAM, Flash or emerging NVM technologies * Strong understanding of layout design including ...
Postdoctoral Fellow - ECE Y. Zhang
Charlotte, NC · On-site
$60K/yr
D in Electrical Engineering, Physics or related areas awarded within the last five years. * SRAM design, fabrication, and testing: Expertise in all areas is highly preferred * Design, fabrication ...
Postdoctoral Fellow - ECE Y. Zhang
Charlotte, NC · On-site
$60K/yr
D in Electrical Engineering, Physics or related areas awarded within the last five years. * SRAM design, fabrication, and testing: Expertise in all areas is highly preferred * Design, fabrication ...
Work closely with other engineering teams, such as analog and digital, to ensure seamless ... SRAM, DRAM, Flash or emerging NVM technologies * Strong understanding of layout design including ...
Work closely with other engineering teams, such as analog and digital, to ensure seamless ... SRAM, DRAM, Flash or emerging NVM technologies * Strong understanding of layout design including ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$150K - $277K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$150K - $277K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
Sram Design Engineer information
See salary details
$18.03 - $23.08
1% of jobs
$23.08 - $28.13
2% of jobs
$28.13 - $33.17
7% of jobs
$33.17 - $38.22
11% of jobs
$39.68 is the 25th percentile. Wages below this are outliers.
$38.22 - $43.27
14% of jobs
$43.27 - $48.32
15% of jobs
The median wage is $48.51 / hr.
$48.32 - $53.37
14% of jobs
$53.37 - $58.41
8% of jobs
$59.90 is the 75th percentile. Wages above this are outliers.
$58.41 - $63.46
12% of jobs
$63.46 - $68.51
12% of jobs
$68.51 - $73.56
5% of jobs
$18
$50
$73
How much do sram design engineer jobs pay per hour?
What are the key skills and qualifications needed to thrive in the Sram Design Engineer position, and why are they important?
To thrive as a Sram Design Engineer, a strong background in electrical engineering, VLSI design, and semiconductor device physics—often supported by a relevant bachelor’s or master’s degree—is essential. Expertise in industry-standard EDA tools like Cadence, Synopsys, and Mentor Graphics, as well as experience with HDL languages such as Verilog or VHDL, is typically required. Attention to detail, problem-solving skills, and the ability to communicate effectively with cross-functional teams are important soft skills for the role. These skills ensure high-quality SRAM design, efficient collaboration, and the ability to meet both performance and reliability targets in advanced integrated circuits.
What are the typical daily responsibilities of a Sram Design Engineer?
As a Sram Design Engineer, your daily tasks often include designing and verifying static random-access memory (SRAM) circuits, running simulations to validate performance, and troubleshooting design issues. You’ll collaborate closely with layout engineers, verification teams, and other design engineers to optimize memory architectures and ensure compliance with power, area, and timing specifications. Additionally, you may attend design reviews, document design methodologies, and interact with foundries during tape-out or silicon validation phases. This role frequently involves both independent technical work and teamwork within a multidisciplinary environment focused on delivering high-performance semiconductor products.
What is an SRAM Design Engineer job?
An SRAM Design Engineer is responsible for designing Static Random-Access Memory (SRAM) circuits used in semiconductor chips. They focus on optimizing performance, power consumption, and area efficiency while ensuring reliable functionality. Their work includes transistor-level design, layout, simulation, and verification of SRAM cells, sense amplifiers, and peripheral circuits. They collaborate with process engineers and digital designers to integrate SRAM into larger systems. Strong knowledge of VLSI design, circuit theory, and semiconductor technology is essential for this role.

Senior Staff Engineer, Memory/SRAM Circuit Design Engineer
San Jose, CA • On-site
Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Posted 9 days ago
Samsung Electronics rating
6.7
Based on 50 frontline employees who took The Breakroom Quiz
112th of 143 rated electronics manufacturers
Job description
Position Summary
Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!Role and Responsibilities
As a Senior Staff Memory/SRAM Circuit Design Engineer, you will help drive the development of high-performance, power- and area-efficient SRAM and custom memory macros that enable next-generation CPU and GPU applications. Your work will directly influence product competitiveness by delivering differentiated memory solutions optimized for advanced technology nodes.
In this high-impact individual contributor role, you will be part of a specialized custom design team driving innovation across circuit design and design-technology co-optimization (DTCO). You will translate advanced process capabilities into robust, production-ready memory solutions, influencing both circuit architecture and technology direction to achieve industry-leading performance, power, area (PPA) targets.
Leveraging your expertise in one or more technical areas, you will contribute to the end-to-end design and delivery of SRAM and custom memory circuits, including transistor-level design, logic and functional verification, timing generation, layout supervision, physical verification (LVS/DRC), and post-layout validation (SPICE, EMIR/noise).
You thrive on developing and applying advanced circuit design techniques, exploring new architectures and methodologies to optimize PPA targets beyond standard memory solutions.
You help lead DTCO-driven innovation by analyzing the interaction between process technology and circuit behavior, and influencing layout rules, device characteristics, and memory architecture for advanced nodes (5nm) to the process technology team.
You drive cross-functional collaboration with hardware design, architecture, SoC, software, and foundry teams to enable seamless integration of SRAM into system designs, while contributing to methodology, automation, and flow improvements that enhance design quality and productivity.
You inspire high performance by mentoring junior engineers, fostering a culture of ownership and innovation, documenting designs and methodologies, and staying ahead of emerging memory technologies and advanced technology nodes.
Skills and Qualifications
11+ years of experience with a Bachelor's Degree in Computer Science/Engineering, or 9+ years of experience with a Master's Degree, or 7+ years of experience with a Ph.D.
Strong expertise in SRAM circuit design, timing generation, logic/functional verification, and physical verification (LVS/DRC).
Experience with advanced node design and DTCO, including technology, logic and memory cell architecture, and interconnect exploration, for below 5nm
Strong proficiency with industry-standard design tools and scripting languages (Python, Perl)
Strong understanding of computer architecture and SoC integration.
Excellent analytical, and problem-solving skills, with the ability to propose data-driven solutions and guide execution.
Excellent written and verbal communication skills for documenting designs, methodologies, and best practices.
Excellent collaboration skills, with the ability to navigate ambiguity and influence in a fast-paced, global team environment.
Preferred qualifications:
Multiple-Foundry experience is a big plus.
Ability to design memory with excellent PPA (Power, Performance, Area) under given SPEC.
Lead of memory bit cell and custom circuit related DTCO.
Exposure to emerging technologies such as Processing-in-Memory (PIM).
Our Team
The Advanced Design Technology and Design Implementation teams play a critical role in enabling GPU and system-level development within Samsung SARC/ACL and the broader System LSI organization. Operating at the intersection of design technology and physical implementation, we partner closely with Foundry from early technology exploration through the full development cycle. Spanning advanced design methodologies, GPU physical design, CAD, and DTCO, we accelerate adoption of leading technology nodes and deliver optimized power, performance, area (PPA), silicon quality, and turnaround time for next-generation IP solutions.
You will join a highly collaborative, fast-paced environment working across parallel development cycles with direct impact on consumer technologies used worldwide. Here, you'll help build what's next: experimenting with new ideas, broadening your technical expertise, and solving impactful challenges alongside talented teammates who value ownership, continuous learning, and growth.
Total Rewards
At Samsung - SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $180,200 and $297,200. Your actualbase pay will depend on variables that may includeyour educationskills, qualifications, experience, and worklocation.
Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.
Additionally, this role might be eligible to participate in long term incentive plan and relocation.
This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).
U.S. Export Control
This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.
Trade Secrets
By submitting an application, you [applicant] agree[s] not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity.
#SARC #ACL
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Pay
Benefits
Hours and flexibility
Workplace
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About Samsung Electronics
Sourced by ZipRecruiter
Industry
Appliances and electrical and electronics wholesalers, technology, communication and media and manufacturing
Company size
10,000+ Employees
Headquarters location
Ridgefield Park, NJ, US