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Soc Verification Engineer Jobs (NOW HIRING)

K-Tek Resourcing LLC

Design Verification Engineer

Sunnyvale, CA · On-site

$161K - $197K/yr

Title - Design Verification Engineer -Performance Modelling Location - Sunnyvale CA, Austin TX or ... Experience with CPU, GPU, AI/ML, Multimedia, Interconnect, or SoC verification. * Familiarity with ...

Purple Hires Inc

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

S. or M.S. in Electrical Engineering, Computer Engineering, or related field. 3+ years of experience in ASIC/SoC verification. Solid understanding of SystemVerilog, digital logic, and hardware ...

Etech Hi

DV Engineer

Milpitas, CA

Senior ASIC/SoC Design Verification Engineer (Chip-Level Verification) An outstanding, full-time opening is available in Silicon Valley, CA for an experienced ASIC/SoC Design Verification Engineer ...

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Soc Verification Engineer information

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$80K

$142.6K

$203.5K

How much do soc verification engineer jobs pay per year?

As of Jul 15, 2026, the average yearly pay for soc verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a SoC Verification Engineer, and why are they important?

To thrive as a SoC Verification Engineer, you need a solid background in digital design, verification methodologies (such as UVM or SystemVerilog), and a degree in electrical engineering or a related field. Familiarity with simulation tools (e.g., ModelSim, VCS), version control systems, and scripting languages like Python or Perl is typically required. Strong problem-solving, attention to detail, and effective teamwork set outstanding candidates apart. These skills are crucial for ensuring the functionality, reliability, and timely delivery of complex system-on-chip products.

How does a SoC Verification Engineer typically collaborate with design and firmware teams during the product development cycle?

As a SoC Verification Engineer, you will regularly work alongside design and firmware teams to ensure that the integrated circuits function as intended. Collaboration often involves reviewing design specifications, clarifying requirements, and providing early feedback on testability. During the verification phase, you will coordinate testbench development, share simulation results, and help diagnose issues detected in the design. This close interaction is essential for identifying design bugs early, aligning on functionality, and meeting project milestones efficiently.

What are SoC Verification Engineers?

SoC Verification Engineers are professionals who ensure that System-on-Chip (SoC) designs function as intended before manufacturing. They create and run tests, develop verification plans, and use simulation tools to identify and fix design bugs. Their work is crucial for delivering reliable and high-performance chips used in devices like smartphones, computers, and automotive systems. SoC Verification Engineers collaborate closely with design engineers and use specialized languages and tools such as SystemVerilog, UVM, and simulation platforms.
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Soc Verification Engineer jobs near you
Infographic showing various Soc Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 2% Part Time, and 3% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.
Design Verification Engineer

Design Verification Engineer

K-Tek Resourcing LLC

Sunnyvale, CA • On-site

$161K - $197K/yr

Other

Posted 8 days ago

Job description

Title – Design Verification Engineer -Performance Modelling

Location – Sunnyvale CA, Austin TX or Remote

Key Responsibilities
  • Develop, maintain, and enhance STL (Scenario/Test List) generation scripts and performance validation infrastructure.
  • Monitor performance regression status and track key performance indicators (KPIs) across IP and subsystem level verification environments.
  • Analyze regression failures and collaborate with IP, Design, and DV owners to drive issue resolution.
  • Debug verification tests that fail to meet defined performance metrics and benchmark targets.
  • Create, maintain, and update performance test plans, validation dashboards, and result tracking reports.
  • Develop and execute SystemVerilog/UVM-based testcases and regression suites.
  • Drive verification closure through regression analysis, debugging, and coverage tracking.
  • Automate validation and reporting workflows using Python, Perl, or Shell scripting.
  • Work closely with architects, designers, software teams, and validation engineers to ensure feature and performance signoff.
Required Qualifications
  • Bachelor''s or Master''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • 5+ years of Design Verification experience.
  • Strong expertise in SystemVerilog and UVM.
  • Experience developing and maintaining verification testbenches and regression environments.
  • Strong debugging and root-cause analysis skills.
  • Experience with verification planning, test development, and coverage closure.
  • Proficiency in Python, Perl, or Shell scripting.
  • Experience using industry-standard simulators and debug tools such as VCS, Xcelium, Questa, Verdi, or equivalent.
Preferred Qualifications
  • Experience with performance validation, KPI tracking, or performance regression analysis.
  • Experience with CPU, GPU, AI/ML, Multimedia, Interconnect, or SoC verification.
  • Familiarity with performance benchmarking methodologies.
  • Experience with emulation, FPGA prototyping, or post-silicon validation environments.
  • Exposure to Formal Verification methodologies is a plus.
Key Skills
  • SystemVerilog
  • UVM
  • Python / Perl / Shell
  • Regression Debugging
  • Verification Planning
  • Coverage Analysis
  • Performance Validation
  • KPI Tracking
  • Root Cause Analysis
  • SoC/IP Verification

Current tasks owned by Nithin

  • Own and maintain healthy performance regression suites.
  • Ensure performance KPIs are continuously tracked and reported.
  • Drive timely debug and closure of performance-related test failures.
  • Maintain accurate and up-to-date performance validation plans and dashboards.
  • Partner effectively with cross-functional teams to achieve verification and performance signoff.

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