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Soc Design Jobs in Arizona (NOW HIRING)

Intel

RTL Design Engineer

Phoenix, AZ · On-site

$105K - $200K/yr

Supports SoC customers to ensure highquality integration of the CPU block. Qualifications: Minimum ... tools (Design Compiler, Genus)oScripting languages (Python, Perl, TCL)Preferred ...

Viasat, Inc.

Hardware Engineer (Space)

Tempe, AZ · On-site

$129K - $194K/yr

Your contributions will include defining FPGA architecture, SoC integration, schematic capture, and mixed-signal circuit design including ADC/DAC interfaces. You will be part of a multidisciplinary ...

Viasat, Inc.

Hardware Engineer (Space)

Tempe, AZ · On-site

$129K - $194K/yr

Your contributions will include defining FPGA architecture, SoC integration, schematic capture, and mixed-signal circuit design including ADC/DAC interfaces. You will be part of a multidisciplinary ...

Cirrus Logic

Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

We are seeking an experienced and innovative Design Verification Engineer to join a world-class ... Experience verifying mixed-signal ASICs in complex SoC environments. * Knowledge of signal ...

Intel

CPU RTL Design Engineer

Phoenix, AZ · On-site

$141K - $269K/yr

As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic ... Collaborate with SoC customers to ensure seamless integration and high-quality performance of the ...

Intel

Senior Analog Design Engineer

Phoenix, AZ · On-site

$200K/yr

Collaborate with cross-functional teams including architecture, logic, verification, physical design, layout, post-silicon manufacturing and validation teams, and SOC partners. Drive design reviews ...

Intel Corporation

Senior Analog Design Engineer

Phoenix, AZ · On-site

$200K/yr

... and SOC partners. • Drive design reviews and ensure adherence to design methodologies. • Facilitate design development and convergence across global teams designing concurrently in numerous ...

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Soc Design information

What are the most common challenges encountered by SoC design engineers during the integration phase, and how can they be managed?

SoC Design engineers often face challenges during the integration phase, such as ensuring compatibility between diverse intellectual property (IP) blocks and managing complex system verification. These challenges can be managed by thorough documentation, using automated verification tools, and maintaining close collaboration with cross-functional teams including verification, firmware, and layout engineers. Regular integration reviews and adopting standardized interfaces also help minimize issues and streamline the process. Proactively addressing these challenges not only improves project timelines but also enhances the reliability of the final silicon.

What is SoC design?

SoC design refers to the process of designing a System on Chip, which is an integrated circuit that consolidates all components of a computer or electronic system onto a single chip. This includes the central processing unit (CPU), memory, input/output ports, and secondary storage, among others. SoC design is crucial in modern electronics, especially for mobile devices, IoT devices, and embedded systems, as it enables higher performance, lower power consumption, and smaller physical size. The process involves hardware architecture, verification, and often includes software integration to ensure all parts work together seamlessly.

What are the key skills and qualifications needed to thrive as a SoC design engineer?

To thrive as an SoC Design Engineer, you need a solid background in digital design, microarchitecture, and hardware description languages (HDLs) like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with EDA tools (such as Synopsys or Cadence), simulation platforms, and knowledge of industry standards like ARM or PCIe are essential, and certifications in hardware design can be advantageous. Strong problem-solving skills, teamwork, and effective communication set outstanding candidates apart in this collaborative and detail-oriented field. These skills are critical to ensure efficient, reliable, and innovative chip designs that meet performance, power, and cost requirements.

What is the difference between Soc Design vs Hardware Design?

AspectSoc DesignHardware Design
Required CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are commonBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are common
Work EnvironmentDesigning integrated circuits and system architecture, often in collaborative teams within tech or semiconductor companiesCreating detailed hardware schematics, PCB layouts, and component specifications, typically in electronics or manufacturing firms
Employer & Industry UsageUsed by semiconductor companies, tech firms, and integrated circuit manufacturersUsed by electronics manufacturers, hardware companies, and embedded systems firms

Soc Design and Hardware Design share similar educational backgrounds and work environments, but Soc Design focuses on integrating multiple components into a single system-on-chip, while Hardware Design emphasizes creating individual hardware components and schematics. Both roles are essential in the electronics industry and often overlap in skills and tools used.

What are popular job titles related to Soc Design jobs in Arizona? For Soc Design jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Soc Design jobs in Arizona look for? The top searched job categories for Soc Design jobs in Arizona are:
Soc Design jobs near you
Infographic showing various Soc Design job openings in Arizona as of August 2026, with employment types broken down into 92% Full Time, and 8% Contract. Highlights an 85% In-person, and 15% Remote job distribution.

Principal Engineer - Analog Design (IP Tech Lead)

Microchip Technology

Chandler, AZ • On-site

Full-time

Medical, Retirement

Re-posted 9 days ago

Microchip Technology rating

8.0

Company rating: 8.0 out of 10

Based on 33 frontline employees who took The Breakroom Quiz

55th of 156 rated electronics manufacturers

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
The Mixed Signal Development Group is responsible for delivering analog and mixed-signal IPs to product divisions within Microchip. We work with leading edge CMOS and FinFET processes to produce analog integrated circuits for wireline applications. We enable technology that allows Microchip's products to interface to the outside world.
As a Mixed-Signal IP Technical Lead/Architect in the Mixed-Signal Development Group, you will be responsible for the end-to-end technical leadership of mixed-signal IPs-including IP licensing, integration, and silicon validation support-across a range of advanced SoC projects. Your focus will be on key analog and mixed-signal building blocks such as high-speed SERDES, PLLs, PVT sensors, IOs, and other critical IPs. You will collaborate closely with cross-functional teams to ensure successful delivery and integration of IPs into complex SoC designs.
Key Responsibilities:
  • Define and review mixed-signal IP interface specifications, integration guidelines, and verification plans.
  • Lead the evaluation, selection, and licensing of third-party and internally developed IPs for SoC projects.
  • Collaborate with silicon IP vendors to customize IP solutions and finalize Statement of Work (SOW)
  • Architect and drive the integration of mixed-signal IPs into SoC designs, ensuring optimal performance and compatibility.
  • Review and sign off system level clocking needs to meet electrical compliance
  • Collaborate with design, verification, physical design, and test engineering teams to resolve integration and validation issues.
  • Maintain up-to-date knowledge of industry trends, standards, and best practices in mixed-signal IP development and integration.
  • Oversee and participate in silicon validation, characterization, and debug of mixed-signal IPs post-fabrication.

Requirements/Qualifications:
Qualifications:
  • Bachelor's degree in electrical engineering or related field with strong analog/mixed-signal background and at least 10 years of experience in analog/mixed-signal IP design, integration, and validation for SoC applications, or a Master's degree with at least 7.5 years of such experience.
  • Strong understanding of SoC architecture, digital-analog interfaces, and system-level integration challenges.
  • Proven expertise in PLLs, high-speed SERDES, PVT sensors, IOs, and other analog building blocks.
  • Familiarity with industry-standard EDA tools for design, simulation, and verification.
  • Experience working with PCIe, SAS, SATA and Ethernet protocols is a plus
  • Experience working with Chiplet technologies is a plus
  • Possess understanding of device physics and basic ESD/Latch-up concepts
  • Strong written and oral communication skills
  • Excellent problem-solving, and leadership skills.
  • Ability to work in a team environment
  • Ability to quickly ramp on new projects

Travel Time:
0% - 25%
Physical Attributes:
Hearing, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
80% sitting, 10% standing, 10% walking, 100% inside
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in the US, is $75,000 - $232,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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