Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC ...
Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC ...
Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC ...
Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
... SoC design Min. * Qualifications: 0-1 yrs of exp. Enginner - CL11 & CL10 Master's degree in Electrical Eng. or Comp. Science RTL2GDSII exp. on advanced tech. nodes (7nm and below) Exp. w/low power ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
... SoC design Min. * Qualifications: 0-1 yrs of exp. Enginner - CL11 & CL10 Master's degree in Electrical Eng. or Comp. Science RTL2GDSII exp. on advanced tech. nodes (7nm and below) Exp. w/low power ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
Perform physical design implementation of custom IP and SoC designs, covering all aspects of the physical design flow, including synthesis, place and route, clock tree synthesis, floor planning ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
Perform physical design implementation of custom IP and SoC designs, covering all aspects of the physical design flow, including synthesis, place and route, clock tree synthesis, floor planning ...
SoC Interconnect Technology Team Lead
Chandler, AZ · Hybrid
$242K - $314K/yr
We are seeking an experienced SoC Interconnect Technology Team Lead to drive the architecture, design, and execution of next-generation coherent and non-coherent interconnect solutions for advanced ...
SoC Interconnect Technology Team Lead
Chandler, AZ · Hybrid
$242K - $314K/yr
We are seeking an experienced SoC Interconnect Technology Team Lead to drive the architecture, design, and execution of next-generation coherent and non-coherent interconnect solutions for advanced ...
Senior CPU RTL Design Engineer - Power Management
Phoenix, AZ · On-site
$164K - $269K/yr
Partner with SoC integration teams for full-chip delivery * Contribute to design methodology improvements and scalability Behavioral Traits that we are looking for: * Ownership & Accountability ...
Senior CPU RTL Design Engineer - Power Management
Phoenix, AZ · On-site
$164K - $269K/yr
Partner with SoC integration teams for full-chip delivery * Contribute to design methodology improvements and scalability Behavioral Traits that we are looking for: * Ownership & Accountability ...
Senior SoC Chiplet Architect
Phoenix, AZ · On-site
You will drive modular, scalable SoC design approaches, including cross-chiplet coherency, system infrastructure (boot/reset/telemetry), and RAS/security architectures across multi-die systems. What ...
Senior SoC Chiplet Architect
Phoenix, AZ · On-site
You will drive modular, scalable SoC design approaches, including cross-chiplet coherency, system infrastructure (boot/reset/telemetry), and RAS/security architectures across multi-die systems. What ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
Analog Design Engineer - Tucson, AZ- Active Secret Clearance Req with Security Clearance
Tucson, AZ · On-site
$86.84/hr
Analog Design Engineer needed for an opportunity with SOC's client to work in Tucson, Arizona. Active Secret Clearance Required! Role Overview Electrical Engineer responsible for the design, analysis ...
Analog Design Engineer - Tucson, AZ- Active Secret Clearance Req with Security Clearance
Tucson, AZ · On-site
$86.84/hr
Analog Design Engineer needed for an opportunity with SOC's client to work in Tucson, Arizona. Active Secret Clearance Required! Role Overview Electrical Engineer responsible for the design, analysis ...
Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design * Experience using EDA tools for multi-power domain design (UPF/CPF ...
Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design * Experience using EDA tools for multi-power domain design (UPF/CPF ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC ...
Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design * Experience using EDA tools for multi-power domain design (UPF/CPF ...
Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design * Experience using EDA tools for multi-power domain design (UPF/CPF ...
SoC Architect
Chandler, AZ · On-site
$308K - $417K/yr
Design and develop Arm's SoC architecture based on Arm product IP and system architecture to meet the requirements of best-in-class compute across our market segments. * Work proactively across Arm ...
SoC Architect
Chandler, AZ · On-site
$308K - $417K/yr
Design and develop Arm's SoC architecture based on Arm product IP and system architecture to meet the requirements of best-in-class compute across our market segments. * Work proactively across Arm ...
SoC Verification Engineer
Chandler, AZ · On-site
$133K/yr
New team members in Chandler will join hands with other RTL design and verification engineers spread across UK, US, France and Hungary to build best in class SoC'
SoC Verification Engineer
Chandler, AZ · On-site
$133K/yr
New team members in Chandler will join hands with other RTL design and verification engineers spread across UK, US, France and Hungary to build best in class SoC'
Experience working across CPU, GPU, or SoC design teams. * Publications, patents, or recognized technical contributions. * Experience leading working groups or driving cross-org technical alignment.
Experience working across CPU, GPU, or SoC design teams. * Publications, patents, or recognized technical contributions. * Experience leading working groups or driving cross-org technical alignment.
Sr. IO Design Engineer - SoC & TAP Innovation (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
Microchip Technology Inc. in Chandler, Arizona is seeking a Tech Staff/Sr. Staff IO Design Engineer to develop next-generation storage and memory controller SoC products. You will work in a dynamic ...
Sr. IO Design Engineer - SoC & TAP Innovation (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
Microchip Technology Inc. in Chandler, Arizona is seeking a Tech Staff/Sr. Staff IO Design Engineer to develop next-generation storage and memory controller SoC products. You will work in a dynamic ...
Principal Digital Design Engineer
Chandler, AZ · On-site +1
$200K - $250K/yr
About the Role We are seeking a highly skilled and hands-on Principal Digital Design Engineer to drive the microarchitecture, design, and implementation of complex digital systems and SoC components.
Principal Digital Design Engineer
Chandler, AZ · On-site +1
$200K - $250K/yr
About the Role We are seeking a highly skilled and hands-on Principal Digital Design Engineer to drive the microarchitecture, design, and implementation of complex digital systems and SoC components.
Senior IO Design Engineer - Lead Next‑Gen Storage SoC (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
The role focuses on developing high-performance storage and memory controller SoC products ... Responsibilities include design planning, IO cell placement, and working on JTAG TAP controller ...
Senior IO Design Engineer - Lead Next‑Gen Storage SoC (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
The role focuses on developing high-performance storage and memory controller SoC products ... Responsibilities include design planning, IO cell placement, and working on JTAG TAP controller ...
Soc Design information
What are the most common challenges encountered by SoC design engineers during the integration phase, and how can they be managed?
What is SoC design?
What are the key skills and qualifications needed to thrive as a SoC design engineer?
What is the difference between Soc Design vs Hardware Design?
| Aspect | Soc Design | Hardware Design |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are common | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are common |
| Work Environment | Designing integrated circuits and system architecture, often in collaborative teams within tech or semiconductor companies | Creating detailed hardware schematics, PCB layouts, and component specifications, typically in electronics or manufacturing firms |
| Employer & Industry Usage | Used by semiconductor companies, tech firms, and integrated circuit manufacturers | Used by electronics manufacturers, hardware companies, and embedded systems firms |
Soc Design and Hardware Design share similar educational backgrounds and work environments, but Soc Design focuses on integrating multiple components into a single system-on-chip, while Hardware Design emphasizes creating individual hardware components and schematics. Both roles are essential in the electronics industry and often overlap in skills and tools used.

Full-time
Re-posted 16 days ago
Microchip Technology rating
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Job description
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Job Description:
The Wireless Solutions Group is seeking an experienced Design Engineerfor our next generation high-performance, low-power wireless SoC and attach solutions. In this role, you will be responsible for the design of System-on-Chip (SOC) solutions for wireless applications. You will collaborate closely with cross-functional teams, including verification, analog, validation, and software engineers, to deliver high-quality products. Successful candidate requires strong collaboration across sites and functions, excellent communication, and the ability to thrive in a fast-paced, dynamic environment.
Key Responsibilities:
- Contribute to SOC design from concept to tape-out.
- Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC qualification meets required standards.
- Collaborate with verification teams to ensure thorough design verification according to test plans.
- Work with physical design teams to ensure successful integration and implementation.
- Participate in design reviews to ensure compliance with design standards and project requirements.
- Support the validation team in qualifying silicon ICs and debugging potential issues.
- Contribute to the development and optimization of low-power design techniques and power estimation methodologies.
- Interfacing with external vendors and IP sources to resolve problems.
- Ability to work well in a team and excellent problem solving, verbal and written communication skills.
- Working with members from international design and implementation teams.
Requirements/Qualifications:
Qualifications/Requirements:
- Bachelor's degree in computer engineering, electrical engineering, or related field.
- Minimum 12+ years of experience in digital SOC design, with a focus on low-power design.
- Proficient in RTL design (Verilog/System Verilog), Low-power design, synthesis, timing constraint (SDC) and timing analysis.
- Experience with ASIC design flow including LINT, Formal, CDC/RDC, power estimations, MBIST/DFT concepts, and low-power design techniques.
- Strong understanding of SOC architecture (ARM/MIPS), bus protocols (AMBA, AXI, etc.), and peripheral IPs (USB, Ethernet, I2C, SPI, etc).
- Experience with Bus Matrix design.
- Experience with script Language such as TCL, Perl, and Python.
- Excellent English reading, writing and verbal communication skills.
- Strong analytical and problem-solving skills.
- We are looking for candidates who are self-motivators, energetic, and team players.
Preferred Skills and Experience:
- Master's degree in computer engineering, electrical engineering, or related field.
- Knowledge of Bluetooth/BLE/Wi-Fi communication theory and standard specifications.
- Knowledge of security features and principles of functional safety-compliant design.
- Experience with verification methodologies (UVM/OVM).
- Experience with validation methodologies, including debugging on FPGA and silicon IC boards.
Travel Time:
0% - 25%Physical Attributes:
Hearing, Seeing, TalkingPhysical Requirements:
80% sitting, 10% walking, 10% standingMicrochip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
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About Microchip
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Industry
It services
Company size
10,000+ Employees
Headquarters location
Chandler, AZ, US
Year founded
1989