Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC ...
Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC ...
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Engineering->Platforms->FPGA SoC Group Reports To: Director, Platforms FLSA Status: Exempt Last ... Design, develop, document, debug and test FPGA SoC systems; including: * IP Integration into FPGA ...
Quick apply
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Engineering->Platforms->FPGA SoC Group Reports To: Director, Platforms FLSA Status: Exempt Last ... Design, develop, document, debug and test FPGA SoC systems; including: * IP Integration into FPGA ...
Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC ...
Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
... SoC design Min. * Qualifications: 0-1 yrs of exp. Enginner - CL11 & CL10 Master's degree in Electrical Eng. or Comp. Science RTL2GDSII exp. on advanced tech. nodes (7nm and below) Exp. w/low power ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
... SoC design Min. * Qualifications: 0-1 yrs of exp. Enginner - CL11 & CL10 Master's degree in Electrical Eng. or Comp. Science RTL2GDSII exp. on advanced tech. nodes (7nm and below) Exp. w/low power ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
Perform physical design implementation of custom IP and SoC designs, covering all aspects of the physical design flow, including synthesis, place and route, clock tree synthesis, floor planning ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
Perform physical design implementation of custom IP and SoC designs, covering all aspects of the physical design flow, including synthesis, place and route, clock tree synthesis, floor planning ...
SoC Interconnect Technology Team Lead
Chandler, AZ · Hybrid
$242K - $314K/yr
We are seeking an experienced SoC Interconnect Technology Team Lead to drive the architecture, design, and execution of next-generation coherent and non-coherent interconnect solutions for advanced ...
SoC Interconnect Technology Team Lead
Chandler, AZ · Hybrid
$242K - $314K/yr
We are seeking an experienced SoC Interconnect Technology Team Lead to drive the architecture, design, and execution of next-generation coherent and non-coherent interconnect solutions for advanced ...
Senior CPU RTL Design Engineer - Power Management
Phoenix, AZ · On-site
$164K - $269K/yr
Partner with SoC integration teams for full-chip delivery * Contribute to design methodology improvements and scalability Behavioral Traits that we are looking for: * Ownership & Accountability ...
Senior CPU RTL Design Engineer - Power Management
Phoenix, AZ · On-site
$164K - $269K/yr
Partner with SoC integration teams for full-chip delivery * Contribute to design methodology improvements and scalability Behavioral Traits that we are looking for: * Ownership & Accountability ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164K - $311K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise ...
Analog Design Engineer - Tucson, AZ- Active Secret Clearance Req with Security Clearance
Tucson, AZ · On-site
$86.84/hr
Analog Design Engineer needed for an opportunity with SOC's client to work in Tucson, Arizona. Active Secret Clearance Required! Role Overview Electrical Engineer responsible for the design, analysis ...
Analog Design Engineer - Tucson, AZ- Active Secret Clearance Req with Security Clearance
Tucson, AZ · On-site
$86.84/hr
Analog Design Engineer needed for an opportunity with SOC's client to work in Tucson, Arizona. Active Secret Clearance Required! Role Overview Electrical Engineer responsible for the design, analysis ...
Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design * Experience using EDA tools for multi-power domain design (UPF/CPF ...
Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design * Experience using EDA tools for multi-power domain design (UPF/CPF ...
FPGA VHDL Design Engineer US Citizenship required
$116K - $160K/yr
... SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC ...
FPGA VHDL Design Engineer US Citizenship required
$116K - $160K/yr
... SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
... SOC design - Use of VHDL and Verilog - Use of ARM processor cores and associated peripherals - ASIC supplier management and technical oversight - Expert level knowledge of industry standard ASIC ...
Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design * Experience using EDA tools for multi-power domain design (UPF/CPF ...
Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design * Experience using EDA tools for multi-power domain design (UPF/CPF ...
SoC Architect
Chandler, AZ · On-site
$308K - $417K/yr
Design and develop Arm's SoC architecture based on Arm product IP and system architecture to meet the requirements of best-in-class compute across our market segments. * Work proactively across Arm ...
SoC Architect
Chandler, AZ · On-site
$308K - $417K/yr
Design and develop Arm's SoC architecture based on Arm product IP and system architecture to meet the requirements of best-in-class compute across our market segments. * Work proactively across Arm ...
Experience working across CPU, GPU, or SoC design teams. * Publications, patents, or recognized technical contributions. * Experience leading working groups or driving cross-org technical alignment.
Experience working across CPU, GPU, or SoC design teams. * Publications, patents, or recognized technical contributions. * Experience leading working groups or driving cross-org technical alignment.
Sr. IO Design Engineer - SoC & TAP Innovation (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
Microchip Technology Inc. in Chandler, Arizona is seeking a Tech Staff/Sr. Staff IO Design Engineer to develop next-generation storage and memory controller SoC products. You will work in a dynamic ...
Sr. IO Design Engineer - SoC & TAP Innovation (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
Microchip Technology Inc. in Chandler, Arizona is seeking a Tech Staff/Sr. Staff IO Design Engineer to develop next-generation storage and memory controller SoC products. You will work in a dynamic ...
Principal Digital Design Engineer
Chandler, AZ · On-site +1
$200K - $250K/yr
About the Role We are seeking a highly skilled and hands-on Principal Digital Design Engineer to drive the microarchitecture, design, and implementation of complex digital systems and SoC components.
Principal Digital Design Engineer
Chandler, AZ · On-site +1
$200K - $250K/yr
About the Role We are seeking a highly skilled and hands-on Principal Digital Design Engineer to drive the microarchitecture, design, and implementation of complex digital systems and SoC components.
Senior IO Design Engineer - Lead Next‑Gen Storage SoC (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
The role focuses on developing high-performance storage and memory controller SoC products ... Responsibilities include design planning, IO cell placement, and working on JTAG TAP controller ...
Senior IO Design Engineer - Lead Next‑Gen Storage SoC (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
The role focuses on developing high-performance storage and memory controller SoC products ... Responsibilities include design planning, IO cell placement, and working on JTAG TAP controller ...
People come to work at Microchip because we help design the technology that runs the world. They ... Define the architecture of complex Bluetooth, UWB, and Wi-Fi SoC solutions, including core ...
People come to work at Microchip because we help design the technology that runs the world. They ... Define the architecture of complex Bluetooth, UWB, and Wi-Fi SoC solutions, including core ...
Soc Design information
What are the most common challenges encountered by SoC design engineers during the integration phase, and how can they be managed?
What is SoC design?
What are the key skills and qualifications needed to thrive as a SoC design engineer?
What is the difference between Soc Design vs Hardware Design?
| Aspect | Soc Design | Hardware Design |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are common | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are common |
| Work Environment | Designing integrated circuits and system architecture, often in collaborative teams within tech or semiconductor companies | Creating detailed hardware schematics, PCB layouts, and component specifications, typically in electronics or manufacturing firms |
| Employer & Industry Usage | Used by semiconductor companies, tech firms, and integrated circuit manufacturers | Used by electronics manufacturers, hardware companies, and embedded systems firms |
Soc Design and Hardware Design share similar educational backgrounds and work environments, but Soc Design focuses on integrating multiple components into a single system-on-chip, while Hardware Design emphasizes creating individual hardware components and schematics. Both roles are essential in the electronics industry and often overlap in skills and tools used.
