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Serdes Jobs in Oregon (NOW HIRING)

K2 Space

Senior FPGA Prototyping Engineer

OR · On-site +1

$120K - $225K/yr

Configure and validate digital interfaces including high-speed Ethernet SerDes, SPI, UART, GPIO, and other peripheral interfaces. * Develop FPGA-based traffic generators, protocol checkers, and test ...

Apple

Mixed-Signal Behavioral Modeling Engineer

Beaverton, OR · On-site

$83K - $112K/yr

... DLLs/SERDES/Sensors/Data-converters Good understanding of SPICE circuit simulations, and SystemVerilog/SPICE co-simulations Good understanding of timing synchronous digital logic Ability to write ...

Apple

Mixed-Signal Behavioral Modeling Engineer

Beaverton, OR · On-site

$83K - $112K/yr

... DLLs/SERDES/Sensors/Data-converters Good understanding of SPICE circuit simulations, and SystemVerilog/SPICE co-simulations Good understanding of timing synchronous digital logic Ability to write ...

K2 Space

Senior DFT Engineer

OR · On-site +1

$170K - $250K/yr

Experience in high-speed interfaces (SerDes) or RF/mixed-signal SoCs. * Prior involvement in A0 silicon bring-up and yield ramp. * Experience working in cross-functional, geographically distributed ...

Nvidia

Senior Mask Design Engineer - Hardware

OR · On-site +1

Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in groundbreaking sub-micron CMOS technologies using Cadence ...

Stem Xpert

Mask Design Engineer

Hillsboro, OR

... SerDes, LVDS and top level layout integration of AMS blocks. Good Understanding of deep sub-micron layout techniques and issues in CMOS process technology nodes like 14nm,22nm, 16nm FinFET ...

APCON

Hardware Engineer II

Wilsonville, OR · On-site

$127K - $168K/yr

Experience with SERDES, high speed interfaces, or multi gigabit signaling Why Join APCON * Employee‑only medical and dental coverage fully paid on our base plan * Additional plan option available ...

K2 Space

Senior ASIC Emulation Engineer

OR · On-site +1

$170K - $250K/yr

Experience with SERDES and high-speed data protocols such as PCIe, Ethernet, USB, or multi-gigabit PHYs. Compensation and Benefits: * Base salary range for this role is $170,000 - $250,000 + equity ...

Intel

Director, Engineering

Hillsboro, OR

Demonstrated success delivering high-speed PHY, SerDes, DDR, LPDDR, or other complex mixed-signal IPs into production.Deep expertise in advanced node implementation including Intel 18A, Intel 14A ...

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Showing results 21-40

All JobsSerdes JobsSerdes Jobs in Oregon

Serdes information

See Oregon salary details

$85.1K

$149.4K

$307.1K

How much do serdes jobs pay per year?

As of Sep 7, 2026, the average yearly pay for serdes in Oregon is $149,448.00, according to ZipRecruiter salary data. Most workers in this role earn between $100,400.00 and $167,100.00 per year, depending on experience, location, and employer.

What is a SerDes engineer?

SerDes engineers are professionals who design, develop, and test Serializer/Deserializer (SerDes) circuits and systems. SerDes technology is used to convert data between serial and parallel interfaces, enabling high-speed data transmission in electronics such as computer motherboards, network devices, and integrated circuits. These engineers work on optimizing signal integrity, reducing power consumption, and ensuring reliable data transfer over high-speed links. Their expertise is critical in industries like telecommunications, data centers, and consumer electronics.

What are the key skills and qualifications needed to thrive as a SerDes engineer?

To thrive as a SerDes Engineer, you need strong expertise in high-speed digital and analog circuit design, signal integrity, and a degree in electrical or electronics engineering. Familiarity with EDA tools like Cadence or Synopsys, experience in simulation software, and knowledge of relevant standards (e.g., PCIe, USB, Ethernet) are typically required. Excellent problem-solving abilities, attention to detail, and effective teamwork make someone stand out in this role. These skills are crucial for ensuring robust, high-performance serial communication interfaces in advanced electronic systems.

What are some common challenges faced by SerDes engineers during high-speed interface design projects?

SerDes engineers often encounter challenges related to signal integrity, such as minimizing jitter and crosstalk when working with high-speed data transmission. Achieving reliable performance requires careful PCB layout, selection of appropriate materials, and thorough simulation and validation. Additionally, SerDes engineers must frequently collaborate with hardware, firmware, and verification teams to ensure seamless integration and compliance with industry standards like PCIe or Ethernet. Staying updated with rapidly evolving protocols and troubleshooting interoperability issues are also common aspects of the role.

What is the difference between Serdes vs Network Engineer?

AspectSerdesNetwork Engineer
Required CredentialsTypically certifications in electronics, FPGA, or hardware designNetworking certifications like CCNA, CCNP, or CompTIA Network+
Work EnvironmentHardware labs, manufacturing facilities, R&D centersOffice settings, data centers, client sites
Industry UsageTelecommunications, data communications, hardware manufacturingIT, telecommunications, enterprise networks

Serdes (Serializer/Deserializer) specialists focus on hardware design and signal integrity in communication systems, while Network Engineers manage network infrastructure and connectivity. Both roles require technical expertise but differ in their focus areas and work environments. Understanding these differences helps in choosing the right career path or job search focus.

What are popular job titles related to Serdes jobs in Oregon?

For Serdes jobs in Oregon, the most frequently searched job titles are:

What job categories do people searching Serdes jobs in Oregon look for?

The top searched job categories for Serdes jobs in Oregon are:

What cities in Oregon are hiring for Serdes jobs?

Cities in Oregon with the most Serdes job openings:

Serdes jobs near you
Infographic showing various Serdes job openings in Oregon as of August 2026, with employment types broken down into 82% Full Time, and 18% Contract. Highlights an 84% In-person, and 16% Remote job distribution, with an average salary of $149,448 per year, or $71.8 per hour.

Silicon Validation Engineer - 18316

Synopsys

Hillsboro, OR • On-site

$166K/yr

Full-time

Re-posted 4 days ago

Job description

General Information
Job Title
Silicon Validation Manager
Job ID
18316
City
Hillsboro
State/Province
Oregon
Date Posted
04-Aug-2026
Job Category
Engineering
Job Subcategory
Validation / Verification Eng
Hire Type
Employee
Remote Eligible
No
Base Salary Range: $166000 - $249000
Descriptions & Requirements
Job Description and Requirements
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent years in the lab with oscilloscopes, network analyzers, and test boards that either prove your design works or send you back to the schematic. Managing a validation team is not about standing back and delegating, it is about knowing when a waveform looks wrong, when a debug path is heading into a dead end, and when your team needs air cover to finish the job right. You have debugged enough high-speed SerDes PHYs to know that the hardest problems do not show up in simulation, they show up at 3pm on a Friday when the board is misbehaving and the root cause could be anywhere from the substrate to the test fixture.
Leading people energizes you. You know how to manage a mix of analog designers who think in transfer functions and hardware engineers who think in bring-up sequences, and you can translate between those worlds without losing either group. You do not micromanage, but you also do not disappear. When someone is stuck, you ask the right question or point them to the right tool, and when a test plan is missing a corner case, you catch it before it becomes a schedule slip.
You have opinions about how validation should be done, and you are not afraid to push back when timelines, resources, or test coverage do not line up with reality. At Synopsys, you will lead a team building and validating some of the highest-speed analog IP in the industry, and what you deliver will directly enable customer success.
What You'll Be Doing
  • Lead a cross-functional Silicon Validation Engineering team that includes analog designers and hardware engineers working on high-speed SerDes PHY validation
  • Oversee silicon bring-up, debug, and characterization in a state-of-the-art test lab with high-speed equipment including oscilloscopes, network analyzers, and custom test boards
  • Review and approve characterization test plans, debug strategies, and detailed test reports that meet project timelines and quality standards
  • Coordinate the design and bring-up of test boards and hardware solutions to support silicon testing, debugging, and performance characterization
  • Mentor team members on debugging techniques, circuit behavior analysis, and professional development, creating a culture of technical rigor and knowledge sharing
  • Work with analog design, product engineering, and IP release teams to align validation milestones with product schedules and customer delivery commitments
  • Drive process improvements in validation workflows, test automation, and lab infrastructure to increase team efficiency and test coverage

The Impact You Will Have
  • Enable Synopsys customers to integrate high-speed SerDes IP into their SoCs with confidence, backed by thorough silicon validation and characterization data
  • Reduce time to market for SerDes PHY IP by catching and resolving silicon issues early through disciplined debug and test execution
  • Build a validation team that consistently delivers high-quality test reports, accurate performance data, and actionable insights that feed back into design improvements
  • Strengthen the feedback loop between silicon validation and analog design, ensuring lessons learned in the lab directly improve next-generation IP
  • Expand validation capabilities and lab infrastructure to support increasingly complex high-speed interfaces including NRZ, PAM4, and emerging protocols
  • Mentor engineers who go on to lead validation efforts across Synopsys IP portfolios, raising the technical bar across the organization
  • Contribute to Synopsys Silicon IP's reputation for delivering proven, production-ready IP that meets the performance, power, and reliability requirements of leading semiconductor companies

What You'll Need
  • Bachelor's degree in Electrical Engineering or related field, advanced degree preferred
  • 10+ years of experience in analog IC design, validation, or characterization, with significant hands-on work on high-speed circuits
  • 3+ years of people management experience leading engineering teams, ideally in a validation, test, or hardware engineering context
  • Deep debugging skills and fluency with lab equipment including high-speed oscilloscopes, network analyzers, signal generators, and custom test fixtures
  • Strong understanding of high-speed SerDes architectures, signal integrity, and analog circuit behavior under real-world test conditions
  • Experience with interface protocols such as USB, PCI Express, SATA, Ethernet, and familiarity with NRZ and PAM4 encoding is a plus
  • Scripting or programming experience with MATLAB, Python, or similar tools for test automation and data analysis is a plus

Who You Are
  • You can walk into a lab, look at a waveform on the scope, and know within two questions whether the issue is in the silicon, the board, or the test setup
  • You manage people by clearing obstacles, asking the right technical questions, and knowing when to let your team work and when to step in
  • You write and review test reports that are detailed enough for a design team to act on and clear enough for a customer-facing engineer to understand
  • You push back when a test plan is incomplete, a schedule is unrealistic, or a corner case is being ignored, and you do it in a way that keeps the team moving forward
  • You are comfortable presenting validation results, debug findings, and risk assessments to senior engineering leadership and product management
  • You treat your lab and test infrastructure like a product, you invest in the right tools, maintain equipment, and build processes that scale as the team grows

The Team You'll Be Part Of
You will lead the Silicon Validation Engineering team within Synopsys Silicon IP, focused on high-speed SerDes PHY development. Your team works in a state-of-the-art test lab and collaborates closely with analog design, product engineering, and IP release teams. The group is responsible for bringing up silicon, characterizing performance across process and environmental corners, and delivering the validation data that enables customer adoption of Synopsys SerDes IP. Your recruiter will share more about the broader Silicon IP organization and how this team fits into product development cycles.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
Synopsys logo

About Synopsys

Sourced by ZipRecruiter

Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software partner for creative companies developing the electronic products and software applications we rely on every single day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer building advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver exceptional, secure products for the era of connected everything. The company is headquartered in Mountain View, California, and has approximately 113 offices located throughout North America, South America, Europe, Japan, Asia and India. Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every single day.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Mountain View, CA, US

Year founded

1986

Social media

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