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Remote Formal Verification Engineer Jobs (NOW HIRING)

K2 Space

ASIC Design Verification Engineer

$130K - $200K/yr

Engineered to survive the harshest radiation environments and to fully capitalize on today's and ... Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate. * Drive ...

K2 Space

Principal ASIC Design Verification Engineer

$190K - $285K/yr

Engineered to survive the harshest radiation environments and to fully capitalize on today's and ... Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate. * Drive ...

Logical Intelligence

AI Engineer in ML Data

San Francisco, CA · On-site +1

$134K - $162K/yr

We've won a well-known formal verification benchmark called PutnamBench, which consists of 672 hard ... About the role Join our team as an AI Engineer and help us push the boundaries of what's possible ...

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA · On-site +1

$146K/yr

Along with traditional simulation, you will use other approaches like Formal and Emulation to ... ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification ...

Meta

ASIC Engineer, Design Verification

Austin, TX · On-site +1

$146K/yr

Along with traditional simulation, you will use other approaches like Formal and Emulation to ... ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification ...

IC Enable

RTL Design/AMS Verification Engineer

Richardson, TX · On-site +1

$122K - $149K/yr

Remote considered based on experience and qualifications We are seeking an experienced RTL Design Engineer with a strong background in RTL design, design verification, synthesis, and physical ...

K2 Space

Senior ASIC Design Verification Engineer

$170K - $250K/yr

Engineered to survive the harshest radiation environments and to fully capitalize on today's and ... Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate. * Drive ...

Apex Informatics

ASIC Design Verification Engineer

$139K - $169K/yr

Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or ... Knowledge of advanced verification techniques, including SV Assertions, Formal, and Emulation.

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Remote Formal Verification Engineer information

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$80K

$142.6K

$203.5K

How much do remote formal verification engineer jobs pay per year?

As of Jul 12, 2026, the average yearly pay for remote formal verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is the difference between Remote Formal Verification Engineer vs Remote Hardware Verification Engineer?

AspectRemote Formal Verification EngineerRemote Hardware Verification Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, Computer Science; certifications in formal methodsBachelor's/Master's in Electrical Engineering, Computer Engineering; certifications in hardware testing
Work EnvironmentDesign and analyze digital systems using formal methods remotelyTest and validate hardware components remotely in lab or simulation environments
Industry UsageSemiconductor, electronics, tech companies focusing on verificationSemiconductor, electronics, hardware manufacturing companies
Search & Comparison IntentOften compared due to similar industry and skills, focusing on verification methods

The Remote Formal Verification Engineer specializes in mathematically proving the correctness of digital systems remotely, while the Remote Hardware Verification Engineer tests and validates hardware components remotely. Both roles require strong technical credentials and are used in similar industries, but they focus on different verification techniques and processes.

What are Remote Formal Verification Engineers?

Remote Formal Verification Engineers are professionals who use mathematical methods to verify the correctness of hardware or software designs, ensuring they meet specified requirements and are free from critical errors. They typically work from home or any location outside a traditional office, collaborating with teams online. Their main tasks include writing formal specifications, developing verification strategies, analyzing results, and reporting on system reliability. This role is essential in industries like semiconductor design, automotive, and aerospace, where system failures can have significant consequences.

What are the key skills and qualifications needed to thrive as a Remote Formal Verification Engineer, and why are they important?

To thrive as a Remote Formal Verification Engineer, you need a strong background in digital design, formal verification methodologies, and a relevant degree in computer engineering or a related field. Expertise in formal verification tools (such as JasperGold or Questa Formal), hardware description languages (like Verilog or VHDL), and scripting languages is typically required. Strong problem-solving ability, attention to detail, and effective remote communication skills set top performers apart. These skills ensure the accurate validation of hardware designs, reduce costly errors, and enable efficient collaboration in distributed teams.

How does a Remote Formal Verification Engineer typically collaborate with development and design teams across different time zones?

As a Remote Formal Verification Engineer, effective collaboration with development and design teams is critical, especially when working across multiple time zones. Most teams use a combination of asynchronous communication tools (like email, Slack, and project management platforms) and scheduled video meetings to align on goals, clarify verification requirements, and review progress. It's common to document verification plans and results thoroughly so colleagues in other regions can review and contribute. Flexibility in working hours and proactive communication help ensure smooth handoffs and minimize blockers, making remote collaboration productive and efficient.
More about Remote Formal Verification Engineer jobs
What cities are hiring for Remote Formal Verification Engineer jobs? Cities with the most Remote Formal Verification Engineer job openings:
What are the most commonly searched types of Formal Verification Engineer jobs? The most popular types of Formal Verification Engineer jobs are:
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Remote Formal Verification Engineer jobs near you
Infographic showing various Remote Formal Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 2% Part Time, and 3% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.
Design Verification Engineer - Fully Remote | Upto $175/hr

Design Verification Engineer - Fully Remote | Upto $175/hr

Mercor

New York, NY • Remote

$175/hr

Full-time

Re-posted 16 days ago

Job description

About the job

Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark, General Catalyst, Peter Thiel, Adam D'Angelo, Larry Summers, and Jack Dorsey.

Position: RTL Design Engineers
Type: Contract
Compensation: $100–$175/hour
Location: Remote
Duration: 3+ months
Commitment: 40 hours/week

Role Responsibilities

  • Evaluate digital chip design workflows to enhance AI model training and evaluation.
  • Design and verify RTL components using Verilog/SystemVerilog.
  • Collaborate with architecture, verification, and implementation teams to improve model outputs.
  • Develop reusable verification components and testbench infrastructure.
  • Leverage LLM-based tools to accelerate chip design and verification processes.
  • Work independently and asynchronously to meet project deadlines.

Qualifications

Must-Have

  • 3–10 years of experience in digital RTL design or design verification.
  • Strong proficiency in Verilog/SystemVerilog and UVM.
  • Solid understanding of digital design fundamentals: FSMs, datapaths, pipelines, FIFOs, arbiters, clock/reset domains, bus protocols.
  • Experience with ASIC design flows and common EDA tools.
  • Ability to write clear design documentation and communicate technical tradeoffs.

Preferred

  • Knowledge of AMBA protocols (AXI, AHB, APB).
  • Background in CPU, GPU/ML accelerator, networking, memory subsystem, PCIe/high-speed IO, SoC interconnect, low-power design.
  • Exposure to formal verification or SV/UVM-based design verification.

Start Date

  • Week of 04/23; applications reviewed on a rolling basis.

Compensation & Legal

  • Hourly contractor, Paid weekly.

Application Process (Takes 20–30 mins to complete)

  • Upload resume
  • AI interview based on your resume
  • Submit form

Resources & Support

  • For details about the interview process and platform information, please check: https://talent.docs.mercor.com/welcome
  • For any help or support, reach out to: support@mercor.com

PS: Our team reviews applications daily. Please complete your AI interview and application steps to be considered for this opportunity.