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Remote Formal Verification Engineer Jobs in Seattle, WA

Remote - offsite Hours: 40.0 Overview System One is seeking a highly motivated Nuclear Methods ... Create formal documentation of nuclear methods software requirements, design, implementation, and ...

Integrate with third-party IDV/document verification providers and internal identity services ... Employee divides their time between in-office and remote work. Access to an office location is ...

Integrate with third-party IDV/document verification providers and internal identity services ... Employee divides their time between in-office and remote work. Access to an office location is ...

NUCLEAR ENGINEER

Bremerton, WA · On-site +1

$114K - $149K/yr

To learn more about E-Verify, including your rights and responsibilities, visit e-verify.gov ... remote or isolated sites. You must be able to travel on military and commercial aircraft for ...

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Showing results 1-20

Remote Formal Verification Engineer information

See Seattle, WA salary details

$91K

$162.3K

$231.6K

How much do remote formal verification engineer jobs pay per year?

As of Aug 5, 2026, the average yearly pay for remote formal verification engineer in Seattle, WA is $162,305.00, according to ZipRecruiter salary data. Most workers in this role earn between $154,800.00 and $154,800.00 per year, depending on experience, location, and employer.

What is the difference between Remote Formal Verification Engineer vs Remote Hardware Verification Engineer?

AspectRemote Formal Verification EngineerRemote Hardware Verification Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, Computer Science; certifications in formal methodsBachelor's/Master's in Electrical Engineering, Computer Engineering; certifications in hardware testing
Work EnvironmentDesign and analyze digital systems using formal methods remotelyTest and validate hardware components remotely in lab or simulation environments
Industry UsageSemiconductor, electronics, tech companies focusing on verificationSemiconductor, electronics, hardware manufacturing companies
Search & Comparison IntentOften compared due to similar industry and skills, focusing on verification methods

The Remote Formal Verification Engineer specializes in mathematically proving the correctness of digital systems remotely, while the Remote Hardware Verification Engineer tests and validates hardware components remotely. Both roles require strong technical credentials and are used in similar industries, but they focus on different verification techniques and processes.

What is a remote formal verification engineer?

Remote Formal Verification Engineers are professionals who use mathematical methods to verify the correctness of hardware or software designs, ensuring they meet specified requirements and are free from critical errors. They typically work from home or any location outside a traditional office, collaborating with teams online. Their main tasks include writing formal specifications, developing verification strategies, analyzing results, and reporting on system reliability. This role is essential in industries like semiconductor design, automotive, and aerospace, where system failures can have significant consequences.

What are the key skills and qualifications needed to thrive as a remote formal verification engineer?

To thrive as a Remote Formal Verification Engineer, you need a strong background in digital design, formal verification methodologies, and a relevant degree in computer engineering or a related field. Expertise in formal verification tools (such as JasperGold or Questa Formal), hardware description languages (like Verilog or VHDL), and scripting languages is typically required. Strong problem-solving ability, attention to detail, and effective remote communication skills set top performers apart. These skills ensure the accurate validation of hardware designs, reduce costly errors, and enable efficient collaboration in distributed teams.

How does a remote formal verification engineer typically collaborate with development and design teams across different time zones?

As a Remote Formal Verification Engineer, effective collaboration with development and design teams is critical, especially when working across multiple time zones. Most teams use a combination of asynchronous communication tools (like email, Slack, and project management platforms) and scheduled video meetings to align on goals, clarify verification requirements, and review progress. It's common to document verification plans and results thoroughly so colleagues in other regions can review and contribute. Flexibility in working hours and proactive communication help ensure smooth handoffs and minimize blockers, making remote collaboration productive and efficient.
What are popular job titles related to Remote Formal Verification Engineer jobs in Seattle, WA? For Remote Formal Verification Engineer jobs in Seattle, WA, the most frequently searched job titles are:
What job categories do people searching Remote Formal Verification Engineer jobs in Seattle, WA look for? The top searched job categories for Remote Formal Verification Engineer jobs in Seattle, WA are:
Infographic showing various Remote Formal Verification Engineer job openings in Seattle, WA as of July 2026, with employment types broken down into 92% Full Time, 4% Part Time, and 4% Contract. Highlights an 89% Physical, 4% Hybrid, and 7% Remote job distribution, with an average salary of $162,305 per year, or $78 per hour.

Senior Hardware Design Verification Engineer (SystemVerilog/UVM)

Team Red Dog

Redmond, WA • Remote

$152K - $185K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted yesterday

New


Job description

Team Red Dog is hiring a Senior Hardware Design Verification Engineer (SystemVerilog/UVM) for our client, a leading cloud and software provider and industry-leading technology partner. In this fully remote role, you'll help verify the next generation of Azure networking hardware, contributing to Azure Boost SmartNIC and FPGA technologies that power one of the world's largest cloud platforms. You'll develop and execute SystemVerilog/UVM verification solutions, create comprehensive test plans, automate verification workflows, and partner closely with hardware design engineers to ensure high-quality, high-performance silicon. This is a rare opportunity to influence cutting-edge cloud infrastructure while working on technologies deployed at hyperscale.

Top Required Skills (Must Haves):

  1. SystemVerilog & UVM (7+ years preferred) – Develop, enhance, and execute verification environments, testbenches, assertions, sequences, constraints, and functional coverage for complex IP and SoC hardware designs.
  2. Hardware Design Verification – Perform pre-silicon verification, execute comprehensive test plans, drive coverage closure, debug design issues, and collaborate closely with RTL design teams throughout the development lifecycle.
  3. Networking Hardware & Industry Protocols – Experience verifying networking or storage datapaths with knowledge of protocols such as Ethernet, PCIe, AXI, and AHB within complex hardware systems.
  4. Python and/or Perl Automation – Develop scripts that automate regression testing, continuous integration (CI), verification workflows, and test execution to improve engineering efficiency.

Opportunity Overview:

Join a team responsible for validating the networking technologies that power one of the world's largest cloud platforms. As part of a highly collaborative hardware verification organization, you'll contribute to Azure networking acceleration technologies, including FPGA-based SmartNIC solutions, next-generation Software-Defined Networking (SDN), Remote Direct Memory Access (RDMA), and high-performance networking infrastructure. This fully remote opportunity offers the chance to work on challenging verification problems while partnering with world-class hardware engineers on technologies deployed at massive global scale.

How you will make an impact:

  • Develop comprehensive verification plans for new hardware features and functionality.
  • Execute verification strategies using SystemVerilog and UVM within established verification environments.
  • Create and enhance sequences, assertions, constraints, scoreboards, and functional coverage.
  • Design directed, constrained-random, and stress test scenarios to validate functionality and corner cases.
  • Drive functional, code, assertion, and test plan coverage to verification closure.
  • Debug complex hardware issues and partner with RTL designers to resolve functional and performance defects.
  • Develop Python and/or Perl automation scripts supporting regression testing and CI/CD workflows.
  • Participate in Agile development activities including sprint planning, code reviews, and iterative feature development.
  • Analyze regression results, perform root-cause analysis, and support bug triage activities.
  • Improve verification quality through error injection, congestion, recovery, and backpressure testing.

The expertise you bring:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
  • Approximately 7+ years of hands-on hardware design verification experience using SystemVerilog and UVM.
  • Strong experience performing IP and/or SoC-level pre-silicon verification.
  • Solid understanding of RTL design concepts and modern verification methodologies.
  • Experience with networking or storage hardware verification preferred.
  • Knowledge of networking protocols including Ethernet, PCIe, AXI, AHB, or similar high-speed interfaces.
  • Experience developing automation using Python and/or Perl.
  • Strong debugging, analytical, and problem-solving skills.
  • Ability to work independently within established verification environments.
  • Excellent communication and collaboration skills.
  • Ability to support Pacific Time working hours with approximately 2–3 hours of overlap.
  • Ability to commit to an engagement expected to last approximately 18 months.

What makes a candidate highly successful in this role:

Successful candidates bring deep expertise in SystemVerilog, UVM, and hardware design verification while demonstrating the ability to quickly contribute within an existing verification environment. They have experience validating complex IP or SoC designs, developing reusable verification components, driving comprehensive coverage closure, and collaborating effectively with hardware design teams to resolve challenging issues. Experience verifying networking hardware, SmartNICs, storage datapaths, FPGA technologies, or cloud infrastructure components is highly valued, as is a proven ability to independently own verification efforts from planning through execution and debugging.

Why Work with Team Red Dog?

At Team Red Dog, people are at the heart of everything we do. Our commitment to personalized service and our deep experience in matching talented professionals with meaningful roles at some of the world's most inspiring companies is what sets us apart. We take the time to understand your unique skills, strengths, and passions—because we believe your career should reflect who you are.

Whether you're looking to grow, pivot, or simply find a place where your work truly matters, we offer opportunities that empower you to make a positive impact. With excellent benefits, a supportive team, and a role where you can thrive while doing what you love, we're here to help you take the next step with confidence. Join us—and discover what it means to be genuinely valued in your career.

Generous benefits package for qualified employees includes:

  • Health insurance (medical, dental, vision, and life)
  • Employer-matched 401K plan
  • Accrued Paid Time Off
  • Flexible Paid Holiday Benefit

Estimated Start Date: Immediately

Location: Fully Remote (U.S.) – Must be available to support Pacific Time working hours.

Job #2580

Job Type and Estimated Duration: W2 contract opportunity through June 30, 2027, with the potential to extend up to 18 months total, subject to performance, budget, and client discretion.

Rate: $92–$98/hour

Team Red Dog is committed to providing equal opportunities to everyone, regardless of race, ethnicity, gender, age, religion, sexual orientation, disability, or any other characteristic. If you need accommodation during the recruitment process, reach out to hr@teamreddog.com, and we will work to ensure an accessible experience. We strictly adhere to federal, state, and local laws to maintain a workplace free from discrimination and harassment.

We offer competitive compensation aligned with U.S. industry standards, and our final offer will reflect the candidate's location, job-specific skills, experience, and knowledge.

  • All applicants must be authorized to work in the U.S. without the need for sponsorship.
  • Team Red Dog is an E-Verify employer.
  • Employment is contingent upon the successful completion of a reference and background check.
  • Please no solicitations from C2C or recruiting firms.