ZipRecruiter

Log In

2

Remote Formal Verification Engineer Jobs in Arizona

PowerLattice

Principal Digital Design Engineer

Chandler, AZ · On-site +1

$200K - $250K/yr

While we are primarily seeking candidates in HQ-Vancouer and Chandler, remote flexibility may be ... Experience with formal verification techniques * Experience with silicon bring-up and post-silicon ...

Alphacore Inc

Manager/Lead Analog Design Engineer

Arizona, LA · On-site +1

$193K/yr

Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a ... Develop and verify high-speed ADC (Analog-to-Digital Converter) architectures. * Work closely with ...

Alphacore Inc

Analog Layout Design Engineer

Arizona, LA · On-site +1

$193K/yr

Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a ... Collaborate closely with design and verification teams * Ensure high performance, low noise, and ...

ENFRA LLC

Energy Engineer PE I

Tempe, AZ · On-site +1

Verify utility performance of facilities and validate savings. * Review and analyze energy ... Remote Monitoring * Collect and evaluate energy, weather, and building automation data on some ...

ENFRA LLC

Energy Engineer PE I

Tempe, AZ · On-site +1

$103K - $132K/yr

Verify utility performance of facilities and validate savings. * Review and analyze energy ... Remote Monitoring * Collect and evaluate energy, weather, and building automation data on some ...

ENFRA LLC

Energy Engineer PE I

Tempe, AZ · On-site +1

Verify utility performance of facilities and validate savings. * Review and analyze energy ... Remote Monitoring * Collect and evaluate energy, weather, and building automation data on some ...

Epiq

Software Engineer

Phoenix, AZ · Remote

... LI-Remote The Compensation range for this role is 110,000 to 160,000 USD annually and may be ... In compliance with federal law, all persons hired will be required to verify identity and ...

Lochner

Airport Design Engineer

Mesa, AZ · On-site +1

Flexible Work Schedules (Hybrid or Remote, when possible) * Wellness Program for Physical and ... Background checks include SSN/SIN validation, motor vehicle verification, education verification ...

Circle

Staff Software Engineer

Phoenix, AZ · Remote

$195K - $257K/yr

Excellent communication skills, able to collaborate with remote teams, share ideas and present ... Additionally, Circle participates in the E-Verify Program in certain locations, as required by law.

Circle

Senior Software Engineer

Phoenix, AZ · Remote

$152K - $205K/yr

Excellent communication skills, able to collaborate with remote teams, share ideas and present ... Additionally, Circle participates in the E-Verify Program in certain locations, as required by law.

next page

Showing results 1-20

All JobsRemote Formal Verification Engineer JobsRemote Formal Verification Engineer Jobs in Arizona

Remote Formal Verification Engineer information

What is the difference between Remote Formal Verification Engineer vs Remote Hardware Verification Engineer?

AspectRemote Formal Verification EngineerRemote Hardware Verification Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering, Computer Science; certifications in formal methodsBachelor's/Master's in Electrical Engineering, Computer Engineering; certifications in hardware testing
Work EnvironmentDesign and analyze digital systems using formal methods remotelyTest and validate hardware components remotely in lab or simulation environments
Industry UsageSemiconductor, electronics, tech companies focusing on verificationSemiconductor, electronics, hardware manufacturing companies
Search & Comparison IntentOften compared due to similar industry and skills, focusing on verification methods

The Remote Formal Verification Engineer specializes in mathematically proving the correctness of digital systems remotely, while the Remote Hardware Verification Engineer tests and validates hardware components remotely. Both roles require strong technical credentials and are used in similar industries, but they focus on different verification techniques and processes.

What are Remote Formal Verification Engineers?

Remote Formal Verification Engineers are professionals who use mathematical methods to verify the correctness of hardware or software designs, ensuring they meet specified requirements and are free from critical errors. They typically work from home or any location outside a traditional office, collaborating with teams online. Their main tasks include writing formal specifications, developing verification strategies, analyzing results, and reporting on system reliability. This role is essential in industries like semiconductor design, automotive, and aerospace, where system failures can have significant consequences.

What are the key skills and qualifications needed to thrive as a Remote Formal Verification Engineer, and why are they important?

To thrive as a Remote Formal Verification Engineer, you need a strong background in digital design, formal verification methodologies, and a relevant degree in computer engineering or a related field. Expertise in formal verification tools (such as JasperGold or Questa Formal), hardware description languages (like Verilog or VHDL), and scripting languages is typically required. Strong problem-solving ability, attention to detail, and effective remote communication skills set top performers apart. These skills ensure the accurate validation of hardware designs, reduce costly errors, and enable efficient collaboration in distributed teams.

How does a Remote Formal Verification Engineer typically collaborate with development and design teams across different time zones?

As a Remote Formal Verification Engineer, effective collaboration with development and design teams is critical, especially when working across multiple time zones. Most teams use a combination of asynchronous communication tools (like email, Slack, and project management platforms) and scheduled video meetings to align on goals, clarify verification requirements, and review progress. It's common to document verification plans and results thoroughly so colleagues in other regions can review and contribute. Flexibility in working hours and proactive communication help ensure smooth handoffs and minimize blockers, making remote collaboration productive and efficient.
What are the most commonly searched types of Formal Verification Engineer jobs in Arizona? The most popular types of Formal Verification Engineer jobs in Arizona are:
What are popular job titles related to Remote Formal Verification Engineer jobs in Arizona? For Remote Formal Verification Engineer jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Remote Formal Verification Engineer jobs in Arizona look for? The top searched job categories for Remote Formal Verification Engineer jobs in Arizona are:
What cities in Arizona are hiring for Remote Formal Verification Engineer jobs? Cities in Arizona with the most Remote Formal Verification Engineer job openings:
Remote Formal Verification Engineer jobs near you

Principal Digital Design Engineer

PowerLattice

Chandler, AZ • On-site, Remote

$200K - $250K/yr

Full-time

Medical, Dental, Vision, Retirement

Posted 4 days ago

Job description

Hybrid requiring 3 days a week onsite in the office
Reports To: Head of Engineering
About Us
PowerLattice is a well-funded semiconductor start-up company backed by well-known large Silicon Valley VCs. The company is working on the industry's groundbreaking chiplet solution for a fundamental shift in how high-performance chips get powered, paving the way for the next generation of AI and advanced computing.
About the Role
We are seeking a highly skilled and hands-on Principal Digital Design Engineer to drive the microarchitecture, design, and implementation of complex digital systems and SoC components. This role combines deep technical contribution with team leadership, requiring active involvement from microarchitecture definition through RTL development and into back-end implementation and silicon bring-up.
Key Responsibilities
  • Architecture & Hands-On Design
  • Define microarchitecture for complex digital blocks and subsystems
  • Actively contribute to RTL development for key components
  • Drive design tradeoffs across performance, power, area (PPA), and testability
  • RTL Development & Integration
  • Write, review, and integrate high-quality RTL
  • Lead block- and chip-level integration, resolving interface and system issues
  • Ensure designs are clean for lint, CDC/RDC, and synthesis
  • Back-End & Implementation Ownership
  • Ensure RTL is optimized for synthesis, timing, and physical design
  • Work on scan insertion, test architecture, and coverage closure
  • Perform, review and debug logic equivalence checking (LEC) results between RTL and netlists
  • Define and validate timing constraints (SDC) and complete timing closure
  • Drive and implement timing and functional ECOs as needed
  • Design Quality & Signoff
  • Drive signoff readiness including lint, CDC/RDC, synthesis, LEC, and timing checks
  • Ensure designs meet functional, timing, power, and test requirements
  • Support silicon bring-up, debug, and root-cause analysis
  • Cross-Functional Collaboration
  • Work closely with verification, physical design, DFT, and firmware teams
  • Align design decisions with verification plans and implementation
    Constraints
  • Act as the technical bridge between front-end and back-end teams

Qualifications
This is a Hybrid role requiring 3 days a week onsite at our HQ's in Vancouver, WA (Greater Portland Area) or Chandler, AZ. While we are primarily seeking candidates in HQ-Vancouer and Chandler, remote flexibility may be considered for exceptional candidates in Silicon Valley, CA.
  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field
  • 10+ years of experience in digital design with significant hands-on RTL development
  • Proven track record of delivering complex SoC or subsystem designs to tapeout
  • Strong expertise in:
    • RTL design and microarchitecture
    • SoC integration and standard interfaces
  • Hands-on experience with back-end flows, including:
    • Scan insertion and DFT (scan, MBIST, test coverage)
    • Logic equivalence checking (LEC)
    • Static timing analysis (STA) and timing closure
    • Timing constraint development and debug (SDC)
  • Solid understanding of:
    • Clocking, resets, CDC/RDC, and low-power design
    • Synthesis and physical design implications
  • Experience with industry-standard EDA tools (Synopsys, Cadence)
  • Experience with low-power methodologies (UPF/CPF)
  • Strong debugging and problem-solving skills

Preferred Qualifications
  • Familiarity with advanced technology nodes and implementation challenges
  • Experience with formal verification techniques
  • Experience with silicon bring-up and post-silicon debug

Compensation & Benefits
Anticipated annual base salary for Member of Technical Staff: $200,000 - $250,000
  • Stock option grant
  • Comprehensive benefits package including health, dental, vision, and 401(k)

Apply