1

Principal Asic Design Engineer Jobs in Indiana (NOW HIRING)

FPGA Engineer II with Security Clearance

Fort Wayne, IN · On-site

$113K - $156K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

FPGA Engineer II

Fort Wayne, IN · On-site

$128K - $164K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

FPGA Engineer II

Wayne, IN · On-site

$115K - $148K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

FPGA Engineer II

Fort Wayne, IN

$128K - $164K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

The Principal Mechanical Design Engineer is a senior technical authority responsible for solving the most demanding mechanical design challenges, guiding integrated product teams, and driving ...

The Principal Mechanical Design Engineer is a senior technical authority responsible for solving the most demanding mechanical design challenges, guiding integrated product teams, and driving ...

Showing results 21-40

Principal Asic Design Engineer information

What is the difference between Principal Asic Design Engineer vs Senior Asic Design Engineer?

AspectPrincipal Asic Design EngineerSenior Asic Design Engineer
QualificationsBachelor's or Master's in Electrical Engineering or Computer Engineering; extensive ASIC design experienceBachelor's or Master's in Electrical Engineering or Computer Engineering; significant ASIC design experience
Work EnvironmentLeads design projects, mentors teams, collaborates with cross-functional teamsPerforms complex ASIC design tasks, supports project development, collaborates with engineers
ResponsibilitiesArchitects ASIC solutions, oversees design quality, guides junior engineersDesigns ASIC components, reviews work, implements design improvements

The main difference is that the Principal Asic Design Engineer typically leads projects and mentors teams, while the Senior Asic Design Engineer focuses on executing complex design tasks. Both roles require strong ASIC design skills and relevant experience, but the principal level involves more leadership and strategic responsibilities.

What job categories do people searching Principal Asic Design Engineer jobs in Indiana look for?

The top searched job categories for Principal Asic Design Engineer jobs in Indiana are:

What cities in Indiana are hiring for Principal Asic Design Engineer jobs?

Cities in Indiana with the most Principal Asic Design Engineer job openings:

ASIC Physical Design Engineer (TSMC / FinFET)

SolGenie

Lafayette, IN • On-site

$130K - $134K/yr

Full-time

Re-posted 18 days ago


Job description

Hi
We're hiring for a full-time opportunity with a leading semiconductor R&D organization in USA. This role focuses on TSMC advanced node tape-outs (FinFET), customer engagement, and backend sign-off flows. Detailed job description is given below.
Title: ASIC Physical Design Engineer (TSMC / FinFET)
Location: Lafayette, Indiana ("Relocation assistance provided")
Type: Full time with Client
Tapeout, Signoff, DRC/LVS/PEX, Customer interaction
Job Responsibilities:
  • Act as the primary interface between customers and semiconductor foundries to ensure successful tape-outs
  • Guide customers through design sign-off, including sharing required documentation and technical requirements
  • Collaborate with internal design, layout, and engineering teams to ensure manufacturability
  • Prepare, review, and validate designs for fabrication using EDA tools
  • Support customer engagements by providing technical expertise during pre-sales and project execution
  • Partner with customers throughout the chip design and manufacturing lifecycle to ensure a smooth experience
  • Coordinate with foundry partners (primarily TSMC) on specifications, timelines, and fabrication requirements
  • Track project milestones and drive on-time delivery
  • Maintain accurate documentation of project status, customer communication, and technical details
  • Identify and implement process improvements and automation opportunities

Must-Have Skills & Experience:
  • Proven tape-out experience with advanced TSMC nodes (e.g., FinFET technologies)
  • Strong understanding of semiconductor backend processes
  • Experience working directly with customers and external partners
  • Excellent communication skills (written and verbal)
  • Ability to manage multiple priorities and solve complex technical issues
  • Proactive, detail-oriented, and team-oriented mindset
  • Familiarity with Linux environments
  • Basic scripting or programming experience