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Ai Chip Design Rtl Jobs in Indiana (NOW HIRING)

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Mega-Site Construction Manager

Jeffersonville, IN · On-site

$150K/yr

The data center engineering team thinks from chip to chiller (or electrical substation ... Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable ...

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Mega-Site Construction Manager

Lebanon, IN

$123K/yr

The data center engineering team thinks from chip to chiller (or electrical substation ... Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable ...

Meta

Mega-Site Construction Manager

Lebanon, IN · On-site

$150K/yr

The data center engineering team thinks from chip to chiller (or electrical substation ... Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable ...

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Ai Chip Design Rtl information

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are some common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What are AI Chip Design RTL engineers?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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Ai Chip Design Rtl jobs near you
VP Engineering, IC Design (On-site. West Lafayette, USA)

VP Engineering, IC Design (On-site. West Lafayette, USA)

Elevate Ventures

West Lafayette, IN • On-site

$173K - $223K/yr

Full-time

This job post has expired today. Applications are no longer accepted.

Job description

Build the silicon brain of the next computing era | VP of Engineering, IC Design | Lead chip teams at Ixana

About Ixana Ixana is a Purdue University spinoff developing brain-inspired wearable computing. We've developed Wi-R, a patented wireless communication technology that uses 100x less energy than Bluetooth or Wi‑Fi—streaming high‑speed data through an E‑field bubble around the body. Our 60‑person team is pioneering the first real‑time body‑area‑network platform for wearables, neural sensors, and more.

The Wi‑R Revolution Wi‑R enables ultra‑low‑power, high‑bandwidth communication through electric fields instead of radiating RF—making it ideal for body‑worn devices. Imagine transferring data through a touch or enabling real‑time sensing without battery drain.

See Wi‑R in action: ixana.ai or watch this demo: Contact Transfer with a Tap

The Role: VP Engineering, IC Design We're looking for a visionary leader to build and scale our silicon design organization. You’ll drive innovation, set the technical roadmap, and lead the design and delivery of our Wi‑R chips. This role is critical as we expand Wi‑R into commercial wearables, neural interfaces, and high‑impact edge AI devices.

What You’ll Do

  • Lead and grow a world‑class IC design team across analog, mixed‑signal, RF, and digital domains
  • Own the end‑to‑end chip lifecycle—from concept to GDSII to bring‑up and production
  • Set architectural direction and technical standards across IC design projects
  • Work cross‑functionally with hardware, firmware, and product teams to translate chip performance into real‑world applications
  • Guide vendor/EDA tool engagement, IP integration, and tapeout execution
  • Hire, mentor, and retain exceptional engineering talent
  • Represent engineering in executive strategy discussions and technical partnerships

What We’re Looking For

Required:

  • 10–20 years of experience in analog and mixed‑signal IC design
  • Demonstrated leadership in taking chips from first spec to high‑yield production
  • Deep expertise in design for low‑power, wireless, or wearable applications
  • Experience leading and scaling high‑performance engineering teams
  • Strategic thinker with a hands‑on approach to solving engineering challenges

Preferred:

  • Tapeout experience in startups or product‑first environments
  • Familiarity with system‑level design and integration (including firmware/hardware co‑design)
  • Strong communication and stakeholder management skills
  • A track record of mentorship and team development

Why Ixana?

  • Work on once‑in‑a‑decade tech: ultra‑efficient, body‑centric communication
  • Lead IC engineering at a company where your designs will ship quickly and globally
  • Collaborate with pioneers in wireless, chip, and embedded system design
  • Build a legacy team and define a new category of computing

Location West Lafayette, IN — On‑site at our core R&D and chip design facility (We offer relocation packages for strong candidates.)

Ready to Build the Future?

Apply now with your resume and a summary of the defense partnerships or acquisitions you've led. Include a brief note on why you’re excited to lead defense strategy at Ixana.

Keywords: Semiconductor, RF, Low Power, Wi‑R, Startup

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