ZipRecruiter

Log In

1

Physical Verification Engineer Jobs (NOW HIRING)

Sivaltech

Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Location: Bay Area, CA (Onsite/Hybrid) Experience: 8+ Years Job ... Work closely with RTL designers, architects, and physical design teams throughout the development ...

Intel Corporation

CPU Verification Engineer

Austin, TX · On-site

$134K/yr

The Role and Impact As a CPU Design Verification Engineer , you'll play a pivotal role in ensuring ... Working alongside world-class CPU architects, RTL designers, and physical design teams, you'll help ...

Intel

Design Verification Engineer

Santa Clara, CA · On-site

$141K - $200K/yr

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you ... physical design, or CAD tool flows - Prior work with system IPs such as MMUs SMMU or IOMMU and ...

Purple Hires Inc

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...

CivicMinds, Inc.

Physical Design Engineer

San Diego, CA · On-site

$145K - $150K/yr

Physical Verification, Conformal Low Power (CLP), IR drop analysis, and Formal Verification * Programming and scripting skills (Tcl, perl and/or C) * Clock tree analysis and optimization * Strong ...

previous page

Showing results 41-60

All JobsPhysical Verification Engineer Jobs

Physical Verification Engineer information

See salary details

$80K

$142.6K

$203.5K

How much do physical verification engineer jobs pay per year?

As of Aug 11, 2026, the average yearly pay for physical verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What does a physical verification engineer do?

A typical day for a Physical Verification Engineer involves running physical verification checks such as DRC (Design Rule Checking) and LVS (Layout Versus Schematic), analyzing results, and debugging issues in chip layouts. You’ll work closely with layout, design, and CAD engineers to review violations, propose fixes, and iterate quickly to help meet project deadlines. Collaboration and communication are frequent as you may participate in design reviews and status meetings to resolve cross-functional verification challenges. This dynamic environment offers continuous learning and professional growth as you help ensure the successful tape-out of integrated circuits.

What is a physical verification engineer?

A Physical Verification Engineer is responsible for ensuring that an integrated circuit (IC) design meets manufacturing requirements and design rules. They perform checks such as Design Rule Checks (DRC), Layout vs. Schematic (LVS) verification, and Electrical Rule Checks (ERC) to confirm functionality and manufacturability. Using EDA tools like Calibre, Assura, or Pegasus, they analyze layouts, debug errors, and collaborate with design teams to resolve issues. Their work is crucial in preventing costly fabrication errors and ensuring the final product meets performance and reliability standards.

What are the key skills and qualifications needed to thrive as a physical verification engineer?

To thrive as a Physical Verification Engineer, you need a strong background in microelectronics, VLSI design, and solid knowledge of physical verification methodologies, typically supported by a degree in electrical or computer engineering. Mastery of EDA tools such as Cadence, Mentor Graphics (Siemens), or Synopsys for tasks like DRC, LVS, and ERC is essential, and relevant certifications can enhance your credentials. Critical thinking, attention to detail, and effective communication are key soft skills that help manage complex designs and collaborate with cross-functional teams. These skills and qualities are vital to ensure that integrated circuits meet stringent quality and manufacturability standards, reducing costly errors in semiconductor production.

More about Physical Verification Engineer jobs
What are the most commonly searched types of Physical Verification Engineer jobs? The most popular types of Physical Verification Engineer jobs are:
What job categories do people searching Physical Verification Engineer jobs look for? The top searched job categories for Physical Verification Engineer jobs are:
Physical Verification Engineer jobs near you
Infographic showing various Physical Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 76% Full Time, 18% Part Time, 1% Temporary, 3% Contract, and 1% Nights. Highlights an 98% Physical, 1% Hybrid, and 1% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Verification Engineer

Advanced Micro Devices, Inc

San Jose, CA • On-site

$124K/yr

Full-time

Re-posted yesterday

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 156 rated electronics manufacturers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
As a verification engineer in the AECG Group, you will help bring to life cutting-edge FPGA, ASICs for variety of target customers. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, PD teams, and product engineers to achieve first pass silicon success.
THE PERSON:
You have a passion for modern, complex IP architectures, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBLITIES:
  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  • Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  • Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers
  • Build the directed and random verification tests
  • Run regressions, debug test failures towards ensuring high design functional, performance and implementation quality

PREFERRED EXPERIENCE:
  • Experience in IP level ASIC verification
  • Experience in Verilog, System Verilog, Object Oriented programming
  • Developing UVM based verification frameworks and testbenches,
  • Scripting and automation of verification processes and flows
  • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
  • Good Computer Architecture, systems knowledge
  • Comfortable in python / perl and editing / maintaining scripts
  • Exposure to leadership or mentorship is an asset
  • Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out
  • Experience with PCIe, CXL, NVMe or ethernet protocols
  • Strong communication skills and the ability to work independently as well as in a cross-site team environment

ACADEMIC CREDENTIALS:
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION:
  • San Jose, CA, OR San Diego, CA OR Austin, TX OR Longmont, CO

This role is not eligible for visa sponsorship.
#LI-EV1
#LI-HYBRID
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

What Advanced Micro Devices employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

Apply