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Physical Verification Engineer Jobs (NOW HIRING)

Intel

Design Verification Engineer

Santa Clara, CA

$141K - $200K/yr

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you ... physical design, or CAD tool flows - Prior work with system IPs such as MMUs SMMU or IOMMU and ...

Qorvo, Inc.

Sr Design Verification Engineer

Richardson, TX · On-site

$123K - $150K/yr

Job Summary We are seeking an experienced Engineer to bridge the gap between design teams ... Layout & Physical Verification * Enforce sign-off compliance across all design groups using ...

New

Purple Hires Inc

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a ...

Intel

CPU Verification Engineer

Hillsboro, OR · On-site

$148K/yr

Who You Are Join Intel's Silicon Engineering Group as a CPU Design Verification Engineer, where you ... Working alongside world-class CPU architects, RTL designers, and physical design teams, you will ...

Intel

CPU Verification Engineer

Austin, TX · On-site

$134K/yr

Who You Are Join Intel's Silicon Engineering Group as a CPU Design Verification Engineer, where you ... Working alongside world-class CPU architects, RTL designers, and physical design teams, you will ...

Sivaltech

Senior Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Duration: Full time or Contract Location: Bay Area, CA About Us: We ... Verification, Physical Design, AMS Verification, Layout Design, and circuit design and SDLC.

Futran Tech Solutions Pvt. Ltd.

Physical Design Engineer

$139K - $143K/yr

... Verification, Chip finishing. Should have experience on Physical Design Methodologies and sub ... Good to have experience on programming in Tcl/Tk/Perl to automate design process and improve ...

Analogdevices

Senior Design Verification Engineer

Dallas, TX · On-site

$134K - $164K/yr

ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable ... Senior Design Verification Engineer About the Role As a Senior Design Verification Engineer at ...

Intel

Verification Engineer Senior

Austin, TX

Work closely with SoC architects, micro architects, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and ...

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Physical Verification Engineer information

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$80K

$142.6K

$203.5K

How much do physical verification engineer jobs pay per year?

As of Jul 1, 2026, the average yearly pay for physical verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What does a typical day look like for a Physical Verification Engineer, and how do they collaborate within the design team?

A typical day for a Physical Verification Engineer involves running physical verification checks such as DRC (Design Rule Checking) and LVS (Layout Versus Schematic), analyzing results, and debugging issues in chip layouts. You’ll work closely with layout, design, and CAD engineers to review violations, propose fixes, and iterate quickly to help meet project deadlines. Collaboration and communication are frequent as you may participate in design reviews and status meetings to resolve cross-functional verification challenges. This dynamic environment offers continuous learning and professional growth as you help ensure the successful tape-out of integrated circuits.

What is a Physical Verification Engineer job?

A Physical Verification Engineer is responsible for ensuring that an integrated circuit (IC) design meets manufacturing requirements and design rules. They perform checks such as Design Rule Checks (DRC), Layout vs. Schematic (LVS) verification, and Electrical Rule Checks (ERC) to confirm functionality and manufacturability. Using EDA tools like Calibre, Assura, or Pegasus, they analyze layouts, debug errors, and collaborate with design teams to resolve issues. Their work is crucial in preventing costly fabrication errors and ensuring the final product meets performance and reliability standards.

What are the key skills and qualifications needed to thrive in the Physical Verification Engineer position, and why are they important?

To thrive as a Physical Verification Engineer, you need a strong background in microelectronics, VLSI design, and solid knowledge of physical verification methodologies, typically supported by a degree in electrical or computer engineering. Mastery of EDA tools such as Cadence, Mentor Graphics (Siemens), or Synopsys for tasks like DRC, LVS, and ERC is essential, and relevant certifications can enhance your credentials. Critical thinking, attention to detail, and effective communication are key soft skills that help manage complex designs and collaborate with cross-functional teams. These skills and qualities are vital to ensure that integrated circuits meet stringent quality and manufacturability standards, reducing costly errors in semiconductor production.

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What are the most commonly searched types of Physical Verification Engineer jobs? The most popular types of Physical Verification Engineer jobs are:
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Physical Verification Engineer jobs near you
Design Verification Engineer

Design Verification Engineer

Intel

Santa Clara, CA

$141K - $200K/yr

Full-time

Medical, Retirement, PTO

Posted 11 days ago

Key responsibilities

  • Develop and execute verification plans and testbenches for interconnect and chassis IP/features at IP and subsystem level.

  • Build reusable verification components, checkers, constrained-random tests, and debug infrastructure to improve coverage and productivity.

  • Work with architecture, design, and software teams on spec reviews, feature clarification, bug triage, and closure.

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 144 frontline employees who took The Breakroom Quiz

11th of 141 rated electronics manufacturers

Job description

Job Details:Job Description: 

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across multiple product families. You will work closely with senior engineers to build and execute robust verification plans, develop high-quality reusable environments, and help deliver first-pass silicon success through strong design verification practices. This role requires strong programming and algorithmic problem-solving skills, hands-on verification development, and willingness to work across traditional discipline boundaries. AI-assisted workflows are part of everyday development here.

Responsibilities
- Develop and execute verification plans and testbenches for interconnect and chassis IP/features at IP and subsystem level
- Build reusable verification components, checkers, constrained-random tests, and debug infrastructure to improve coverage and productivity
- Work with architecture, design, and software teams on spec reviews, feature clarification, bug triage, and closure; contribute outside strict DV boundaries when needed
- Analyze simulation failures, root-cause issues quickly, and drive fixes to closure with clear technical communication
- Contribute to functional coverage planning, coverage closure, and quality signoff under guidance of technical leads
- Contribute to both simulation and formal verification efforts; continuously improve verification automation, regression quality, and development efficiency

You should also demonstrate: Proven ability to write clean, reusable, and maintainable verification code and automation scripts, and to collaborate effectively across architecture, design, and software teams

Qualifications:

Minimum Qualifications
- BS/MS in Electrical Engineering, Computer Science, or related field, with 3+ years of relevant experience in design verification
- Programming fundamentals and algorithmic problem-solving skills, with demonstrated hands-on coding experience in SystemVerilog, C/C++, and Python
- Foundation in simulation-based verification methodologies UVM/ABV, with exposure to formal verification concepts; testbench development, debugging, and coverage-driven verification
- Hands-on experience using AI-assisted development tools as part of daily workflow for coding, debugging, and test development

Preferred Qualifications
- Exposure to interconnects and bus protocols for example AMBA AXI/ACE/CHI, PCIe, CXL, UCIe
- Understanding of cache coherency and memory consistency models
- Experience with external interfaces and system integration debug
- Experience with formal verification tools (JasperGold, VC Formal, or similar) and emulation or FPGA-based verification
- Exposure to RTL concepts, physical design, or CAD tool flows
- Prior work with system IPs such as MMUs SMMU or IOMMU and interrupt controllers

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:Business group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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