We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. You'll work closely with cross-functional teams in the U.S. and overseas on high-performance package ...
We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. You'll work closely with cross-functional teams in the U.S. and overseas on high-performance package ...
... Engineering, Technology, Science, a related field, or equivalent practical experience. * 4 years of experience in chip package design/layout using Cadence allegro package designer (APD) or Mentor ...
... Engineering, Technology, Science, a related field, or equivalent practical experience. * 4 years of experience in chip package design/layout using Cadence allegro package designer (APD) or Mentor ...
Manager, Package Design Engineering
San Jose, CA · On-site
$230K - $265K/yr
Role Overview Astera Labs is seeking a Manager, Package Design Engineering to lead and scale our Package Design team in San Jose. In this high-impact role, you'll own the end-to-end delivery of ...
Manager, Package Design Engineering
San Jose, CA · On-site
$230K - $265K/yr
Role Overview Astera Labs is seeking a Manager, Package Design Engineering to lead and scale our Package Design team in San Jose. In this high-impact role, you'll own the end-to-end delivery of ...
Skills: As the IC Package Design Engineer, you demonstrate fundamental knowledge or proven experience in the following: * Proficient in Cadence APD & SiP. * Basic knowledge in high-speed IO ...
Skills: As the IC Package Design Engineer, you demonstrate fundamental knowledge or proven experience in the following: * Proficient in Cadence APD & SiP. * Basic knowledge in high-speed IO ...
Role Overview Astera Labs is seeking a Manager, Package Design Engineering to lead and scale our Package Design team in San Jose. In this high-impact role, you'll own the end-to-end delivery of ...
Role Overview Astera Labs is seeking a Manager, Package Design Engineering to lead and scale our Package Design team in San Jose. In this high-impact role, you'll own the end-to-end delivery of ...
Senior Engineer Package Designer
$190K - $220K/yr
We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. You'll work closely with cross-functional teams in the U.S. and overseas on high-performance package ...
Quick apply
Senior Engineer Package Designer
$190K - $220K/yr
We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. You'll work closely with cross-functional teams in the U.S. and overseas on high-performance package ...
Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...
Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...
Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...
Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...
Packaging Design Engineer I
San Jose, CA · On-site
$72K/yr
Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...
Packaging Design Engineer I
San Jose, CA · On-site
$72K/yr
Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...
Sr. Engineer, Package Design
Santa Clara, CA · On-site
$138K - $190K/yr
Job Summary The Senior Semiconductor Package Engineer is responsible for the specification, design, development, and qualification of unique custom packaging technology for SiTime's revolutionary ...
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Sr. Engineer, Package Design
Santa Clara, CA · On-site
$138K - $190K/yr
Job Summary The Senior Semiconductor Package Engineer is responsible for the specification, design, development, and qualification of unique custom packaging technology for SiTime's revolutionary ...
IC Package Design / Development
San Jose, CA · On-site
$108K - $192K/yr
IC Package Design / Development Role Overview We are seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and productization using advanced node silicon ...
IC Package Design / Development
San Jose, CA · On-site
$108K - $192K/yr
IC Package Design / Development Role Overview We are seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and productization using advanced node silicon ...
IC Package Design / Development
Irvine, CA · On-site
$108K - $192K/yr
IC Package Design / Development Role Overview We are seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and productization using advanced node silicon ...
IC Package Design / Development
Irvine, CA · On-site
$108K - $192K/yr
IC Package Design / Development Role Overview We are seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and productization using advanced node silicon ...
IC Package Design / Development
San Jose, CA · On-site
$108K - $192K/yr
IC Package Design / Development Role Overview We are seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and productization using advanced node silicon ...
IC Package Design / Development
San Jose, CA · On-site
$108K - $192K/yr
IC Package Design / Development Role Overview We are seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and productization using advanced node silicon ...
Principal Engineer, Package Design
Santa Clara, CA · On-site
$164K - $226K/yr
Job Summary The Principal Semiconductor Package Engineer is responsible for the specification, design, development, and qualification of unique custom packaging technology for SiTime's revolutionary ...
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Principal Engineer, Package Design
Santa Clara, CA · On-site
$164K - $226K/yr
Job Summary The Principal Semiconductor Package Engineer is responsible for the specification, design, development, and qualification of unique custom packaging technology for SiTime's revolutionary ...
Packaging Design Engineer
San Luis Obispo, CA · On-site
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Quick apply
Packaging Design Engineer
San Luis Obispo, CA · On-site
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Packaging Design Engineer
Sunnyvale, CA · On-site
$159K/yr
The Packaging Design Engineer serves as the critical technical link between advanced hardware engineering and global operations. In this role, you will lead the end-to-end structural development ...
Packaging Design Engineer
Sunnyvale, CA · On-site
$159K/yr
The Packaging Design Engineer serves as the critical technical link between advanced hardware engineering and global operations. In this role, you will lead the end-to-end structural development ...
Packaging Design Engineer
$106K - $142K/yr
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Packaging Design Engineer
$106K - $142K/yr
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Packaging Design Engineer
San Luis Obispo, CA · On-site
$106K - $142K/yr
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Packaging Design Engineer
San Luis Obispo, CA · On-site
$106K - $142K/yr
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Packaging Design Engineer
$106K - $142K/yr
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Packaging Design Engineer
$106K - $142K/yr
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Packaging Design Engineer
San Luis Obispo, CA · On-site
$106K - $142K/yr
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Packaging Design Engineer
San Luis Obispo, CA · On-site
$106K - $142K/yr
Convert engineering requirements and CAD models into complete packaging designs, drawings and specifications. * Conduct and document validation testing (drop, vibration, shock, environmental, transit ...
Package Design Engineer information
See California salary details
$88.8K - $93K
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$122.2K - $126.4K
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$131.6K is the 25th percentile. Wages below this are outliers.
$130.5K - $134.7K
100% of jobs
$88.8K
$134.7K
How much do package design engineer jobs pay per year?
How does a Package Design Engineer typically collaborate with cross-functional teams during a product development cycle?
What is the difference between Package Design Engineer vs Packaging Designer?
| Aspect | Package Design Engineer | Packaging Designer |
|---|---|---|
| Credentials | Bachelor's in Packaging Engineering, Mechanical Engineering, or related fields | Bachelor's in Graphic Design, Industrial Design, or Packaging Design |
| Work Environment | Manufacturing facilities, R&D labs, engineering teams | Design studios, marketing departments, creative agencies |
| Industry Usage | Consumer goods, electronics, pharmaceuticals, food products | Consumer products, branding, marketing campaigns |
The Package Design Engineer focuses on developing functional, cost-effective, and manufacturable packaging solutions, often working closely with engineering teams. Packaging Designers primarily concentrate on the visual appeal, branding, and creative aspects of packaging. Both roles may collaborate, but their core responsibilities and skill sets differ significantly.
What are the key skills and qualifications needed to thrive as a Package Design Engineer, and why are they important?
What does a Package Design Engineer do?
Full-time
Posted 18 days ago
Job description
We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. You'll work closely with cross-functional teams in the U.S. and overseas on high-performance package substrate design with a focus on signal/power integrity and routing.
Key Responsibilities:
- Perform package substrate design and analysis (SI/PI/routing)
- Collaborate with layout engineers, marketing, and global design teams
- Use tools like HFSS, ADS for package modeling/simulation
- Contribute during pre/post-sales processes
Why is This a Great Opportunity
This is an outstanding technology, great opportunity to learn. Growing company with a lot of IP. Everyone contributes.
Qualifications:
- BS in EE or related field; MS preferred
- 8–10 years of experience in semiconductor package design
- Strong SI/PI analysis, modeling, and simulation skills
- Excellent communication, teamwork, and presentation abilities
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Preferred Skills:
- Expertise in high-speed package/PCB design (SerDes, PCIe, LPDDR, Ethernet)
- Time/frequency domain analysis, impedance, jitter, eye-diagram, BER analysis
- Experience with Hspice, Redhawk, electro-thermal simulation, PDN modeling
- Familiarity with reliability analysis and packaging/assembly rules