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Package Design Engineer Jobs in California (NOW HIRING)

IC Package Engineer

Cupertino, CA · On-site

$2.0K/mo

  • Medical

  • Dental

  • Vision

IC Package Engineer We are seeking an experienced IC Package Design Engineer to drive and own all aspects of substrate layout and package design work. The ideal candidate will have extensive ...

Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...

Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...

Packaging Design Engineer I is primarily responsible for developing custom packaging designs and ... package testing/qualification, and resolving packaging related issues. * Knowledge of packaging ...

ASIC Package Design Manager

San Jose, CA · On-site

$143.80 - $230/hr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

ASIC Package Design Manager Lead ASIC flip‑chip‑BGA package design programs across global engineering teams to meet schedule goals consistently. Location: San Jose, California, United States ...

Showing results 21-40

Package Design Engineer information

See California salary details

$88.8K

$134.7K

How much do package design engineer jobs pay per year?

As of Aug 14, 2026, the average yearly pay for package design engineer in California is $133,271.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,200.00 and $134,200.00 per year, depending on experience, location, and employer.

Are packaging design engineers in demand?

Packaging design engineers are in demand due to the growth of consumer goods, e-commerce, and sustainable packaging initiatives. They often require skills in CAD software and knowledge of materials, with employment opportunities available in manufacturing, branding, and product development sectors.

How does a package design engineer collaborate with cross-functional teams during product development?

Package Design Engineers regularly work with product development, manufacturing, and marketing teams to ensure that packaging solutions meet technical specifications, production capabilities, and branding requirements. This collaboration often involves attending design review meetings, sharing prototypes, and integrating feedback from multiple stakeholders. Effective communication and adaptability are crucial, as engineers must balance functional, cost, and aesthetic considerations throughout the development process.

What is the difference between Package Design Engineer vs Packaging Designer?

AspectPackage Design EngineerPackaging Designer
CredentialsBachelor's in Packaging Engineering, Mechanical Engineering, or related fieldsBachelor's in Graphic Design, Industrial Design, or Packaging Design
Work EnvironmentManufacturing facilities, R&D labs, engineering teamsDesign studios, marketing departments, creative agencies
Industry UsageConsumer goods, electronics, pharmaceuticals, food productsConsumer products, branding, marketing campaigns

The Package Design Engineer focuses on developing functional, cost-effective, and manufacturable packaging solutions, often working closely with engineering teams. Packaging Designers primarily concentrate on the visual appeal, branding, and creative aspects of packaging. Both roles may collaborate, but their core responsibilities and skill sets differ significantly.

What skills and qualifications are needed to be a package design engineer?

To thrive as a Package Design Engineer, a strong background in engineering, materials science, and design principles—often supported by a bachelor's degree in mechanical, packaging, or industrial engineering—is essential. Familiarity with CAD software, prototyping tools, and simulation systems, as well as knowledge of industry standards like ISTA or ASTM, is typically required. Creativity, problem-solving, and effective communication distinguish top performers in this field. These skills are crucial for developing innovative, cost-effective, and functional packaging solutions that meet product, manufacturing, and regulatory requirements.

What does a package design engineer do?

A Package Design Engineer is responsible for designing and developing packaging solutions for products, ensuring that they are both functional and visually appealing. This role involves selecting appropriate materials, considering factors like cost, durability, and environmental impact, as well as collaborating with product development, marketing, and manufacturing teams. Package Design Engineers also conduct tests to ensure packaging protects the product during shipping and storage, and they often use computer-aided design (CAD) software to create prototypes. Their work is crucial for both product safety and brand image.

What job categories do people searching Package Design Engineer jobs in California look for?

The top searched job categories for Package Design Engineer jobs in California are:

Infographic showing various Package Design Engineer job openings in California as of August 2026, with employment types broken down into 1% As Needed, 74% Full Time, 13% Part Time, 2% Temporary, and 10% Contract. Highlights an 93% Physical, 3% Hybrid, and 4% Remote job distribution, with an average salary of $133,271 per year, or $64.1 per hour.

IC Package Engineer

Etched

Cupertino, CA • On-site

$2.0K/mo

Full-time

Medical, Dental, Vision

Re-posted 22 days ago


Job description

About Etched
Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning.
IC Package Engineer
We are seeking an experienced IC Package Design Engineer to drive and own all aspects of substrate layout and package design work. The ideal candidate will have extensive experience with advanced packaging technologies such as CoWoS, large-scale BGA designs, and package warpage mitigation strategies. You will play a key role in ensuring the mechanical and electrical integrity of packages that power the next generation of AI hardware.
Representative Projects:
  • Own the end-to-end package design process, including substrate layout and IC package design, while collaborating with internal teams and external vendors to deliver optimized, manufacturable solutions
  • Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating stiffeners as needed
  • Expertise in large-scale BGA design, including experience with packages exceeding 4000-ball arrays, ball pitch optimization, routing, and power/ground plane design
  • Conduct mechanical and warpage analysis to address package warpage and coplanarity requirements across varying package sizes, collaborating with mechanical teams for simulation and testing to minimize thermal and mechanical stress
  • Perform design validation by assessing package layouts against electrical and mechanical constraints, providing design reviews and guidance on substrate and interconnect solutions, while archiving DFM-related learning for continuous improvement opportunities
  • Collaborate cross-functionally with chip design, thermal, mechanical, and manufacturing teams to ensure holistic package solutions, while interfacing with vendors to align design requirements and production feasibility
  • Oversee package reliability testing, including thermal, warpage, shock, shear, HTSL, HAST, ALT, JESD22, and electrical tests, while interfacing with various vendors to ensure compliance and quality

You maybe a good fit if you have
  • Bachelor's or Master's degree in Electrical Engineering, Mechanical Engineering, or related discipline
  • 5+ years of experience in advanced IC package design, including CoWoS or equivalent technologies
  • Proven experience in substrate layout and BGA package design for large ball arrays (>4000 balls) with >20Ghz signaling and >500W
  • Strong understanding of stiffener design, open vs. closed package requirements, and package warpage and coplanarity challenges across various sizes
  • Proficiency in package design tools such as Cadence APD/SIP, Mentor Xpedition, or similar
  • Familiarity with mechanical stress analysis, simulation, and validation methodologies
  • Solid communication skills to work across multi-disciplinary teams and external partners
  • Experience with advanced packaging nodes (e.g., 2.5D/3D stacking)
  • Knowledge of thermal management techniques in package design
  • Previous experience working in AI, HPC, or semiconductor design companies

We encourage you to apply even if you do not believe you meet every single qualification.
How we're different:
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
Benefits:
  • Full medical, dental, and vision packages, with 100% of premium covered, 90% for dependents
  • Housing subsidy of $2,000/month for those living within walking distance of the office
  • Daily lunch and dinner in our office
  • Relocation support for those moving to Cupertino