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Overnight Computer Chip Engineer Jobs in California

Nova Ltd.

Mechanical Engineering Tech Lead

Fremont, CA · On-site

$130K - $200K/yr

We are seeking a Sr. Mechanical Design Engineer to join our multi-disciplinary team focused on ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Astera Labs

Chip Lead, Senior Director

San Jose, CA · On-site

Drive chip development execution from RTL to GDSII, ensuring architecture, implementation, and ... Bachelor's degree in Electrical Engineering, Computer Engineering, or related field * 15+ years of ...

Nova Ltd.

Mechanical Engineering Tech Lead

Fremont, CA · On-site

$130K - $200K/yr

Description We are seeking a Sr. Mechanical Design Engineer to join our multi-disciplinary team ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Efficient Computer

Test Engineer

San Jose, CA · On-site

Efficient Computer is looking for a Test Engineer with hands-on DFT and fabless semiconductor test ... Own test engineering across multiple active chip programs simultaneously * Build scalable test ...

Nvidia

Manager, Chip Software

Santa Clara, CA · On-site

NVIDIA is seeking an experienced Chip Software Project management leader to help us define, build ... Bachelors or master's degree in Computer Science/ Electrical / Electronic engineering or related ...

Efficient Computer

Test Engineer

San Jose, CA

$150K - $190K/yr

Efficient Computer is a fabless semiconductor startup headquartered in Pittsburgh, PA, building ... Own test engineering across multiple active chip programs simultaneously * Build scalable test ...

Nova Ltd.

Technical Support Engineer

Fremont, CA · On-site

$100K - $148K/yr

The technical support engineer will apply scientific methodologies and robust statistical ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Nova Ltd.

Technical Support Engineer

Fremont, CA · On-site

$100K - $148K/yr

The technical support engineer will apply scientific methodologies and robust statistical ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Meta

CAD and Integration Engineer, Silicon

Sunnyvale, CA · On-site

$212K - $294K/yr

We are looking for a CAD and Integration Engineer to join our custom silicon team. Working in close ... for chip-level CAD methodology and integration flows • Experience with hierarchical chip ...

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Overnight Computer Chip Engineer information

What is the difference between Overnight Computer Chip Engineer vs Day Shift Computer Chip Engineer?

AspectOvernight Computer Chip EngineerDay Shift Computer Chip Engineer
Work HoursNight shifts, typically overnightDaytime hours, standard business hours
Work EnvironmentManufacturing or R&D facilities during night shiftsSame facilities during daytime
CredentialsSimilar certifications, such as EE degrees and chip design experienceSame credentials as overnight roles
Industry UsageUsed in 24/7 manufacturing plants and R&D labsStandard daytime operations in tech companies

The main difference between Overnight Computer Chip Engineer and Day Shift Computer Chip Engineer lies in their work hours and shift timing. Both roles require similar skills, credentials, and are used in the same industry environments. The overnight position allows companies to maintain continuous production or development, while day shift roles are typical for standard working hours.

What are the most commonly searched types of Computer Chip Engineer jobs in California?

The most popular types of Computer Chip Engineer jobs in California are:

What are popular job titles related to Overnight Computer Chip Engineer jobs in California?

For Overnight Computer Chip Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Overnight Computer Chip Engineer jobs in California look for?

The top searched job categories for Overnight Computer Chip Engineer jobs in California are:

What cities in California are hiring for Overnight Computer Chip Engineer jobs?

Cities in California with the most Overnight Computer Chip Engineer job openings:

Overnight Computer Chip Engineer jobs near you
Infographic showing various Overnight Computer Chip Engineer job openings in California as of August 2026, with employment types broken down into 1% As Needed, 82% Full Time, 13% Part Time, 3% Contract, and 1% Nights. Highlights an 80% Physical, 1% Hybrid, and 19% Remote job distribution.

Sr. Full Chip Physical Verification Engineer (Silicon Engineering)

SpaceX

Irvine, CA • On-site

$165K - $260K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 19 days ago

SpaceX rating

8.8

Company rating: 8.8 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

14th of 72 rated aerospace companies

Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation silicon for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
  • Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools like Calibre, ICV, or Pegasus
  • Develop, maintain, and optimize physical verification flows for advanced node SoC's.
  • Interpret and implement foundry Design Rule Manuals (DRM) - translate rule updates into verified flow changes
  • Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs
  • Perform ESD verification - validate protection strategies, current paths, and CDM/HBM compliance
  • Drive tapeout readiness by coordinating signoff across block and top-level and Hard IP design teams
  • Engage directly with foundry teams to resolve DRM ambiguities and waiver requests.
  • Develop/modify design flows as needed to meet the overall design quality of results and chip integration requirements.Leverage AI agents to automate rule deck validation, violation triage, and signoff reporting workflows

BASIC QUALIFICATIONS:
  • Bachelor's degree in electrical engineering, computer engineering or computer science
  • 5+ years of ASIC and/or physical design flow development experience in industry

PREFERRED SKILLS AND EXPERIENCE:
  • Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation)
  • Experience in IP integration (e.g. memories, I/O's, analog IPs, SerDes, DDR etc.)
  • Deep expertise in DRC, LVS, PERC and ESD verification methodologies
  • Hands-on proficiency with Calibre, ICV (IC Validator), or Pegasus
  • Direct foundry DRM experience - able to read, interpret, and implement complex rule decks
  • Experience at advanced nodes (4nm and below)
  • Experience with large SOC designs (>10M gates) with frequencies in excess of 1GHZ
  • Excellent scripting skills (csh/bash, Perl, Python TCL, Makefile etc.)
  • Self-driven individual with a can-do attitude, and an ability to work in a dynamic group environment

ADDITIONAL REQUIREMENTS:
  • Ability to work extended hours and weekends as needed to meet critical project milestones

COMPENSATION AND BENEFITS:
Pay range:
Physical Design Engineer/Senior: $165,000.00 - $260,000.00/per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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About SpaceX

Sourced by ZipRecruiter

Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US

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