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Remote Computer Chip Engineer Jobs in California

Collaborate closely with the Full Chip owner on the Physical Design team to incorporate necessary ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

ASIC/SOC CAD Engineer

Mountain View, CA · On-site +1

$175K - $362K/yr

MatX is seeking a Physical Design CAD Engineer to join our team as we create best-in-class silicon ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

Develop block-level, sub-system and full-chip verification environment and tests to implement test ... S. (M.S. preferred) degree in Electrical or Computer engineering (or similar field). Reasons to ...

We are headquartered in Los Angeles, CA with both a local and remote team. We were founded and ... CAD Graphics Engine! In this role, you'll work as part of a small team of Graphics Engineers to ...

Headquartered in Sunnyvale, CA, and Munich, Germany, with remote team members across North America ... An MS or PhD in Electrical Engineering, Computer Engineering or related engineering discipline. For ...

Bluespec Design Engineer

Mountain View, CA · On-site +1

$175K - $450K/yr

Develop reusable, parameterized Bluespec libraries that scale across the chip * Shape hardware ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

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Remote Computer Chip Engineer information

What are the key skills and qualifications needed to thrive as a Remote Computer Chip Engineer, and why are they important?

To thrive as a Remote Computer Chip Engineer, you need a strong background in electrical engineering, digital/analog circuit design, and semiconductor fundamentals, typically supported by a relevant degree. Familiarity with CAD tools like Cadence or Synopsys, experience with HDL languages (such as Verilog or VHDL), and knowledge of simulation and verification systems are essential. Excellent problem-solving, self-motivation, and effective remote communication skills set top engineers apart in virtual teams. These competencies ensure high-quality chip development, efficient collaboration, and successful project delivery in a remote work environment.

What does a Remote Computer Chip Engineer do?

A Remote Computer Chip Engineer designs, develops, tests, and optimizes microchips and integrated circuits while working from a remote location. They use specialized software tools to create blueprints, simulate chip behavior, and collaborate with other engineers online. Their work is crucial in developing faster, more efficient processors and electronic devices. By working remotely, they leverage digital communication and project management tools to coordinate with teams around the world.

What are some common challenges faced by Remote Computer Chip Engineers, and how can they be addressed?

Remote Computer Chip Engineers often face challenges related to effective collaboration, particularly when working across different time zones or with team members in various locations. Communication about design updates, debugging, and hardware testing can require extra coordination. To address these issues, teams typically use robust project management tools, regular video meetings, and clear documentation practices. Establishing strong communication channels and proactively sharing progress help ensure everyone stays aligned and projects move forward efficiently.
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Senior ASIC DFT CDC Constraints Engineer - Remote

Futran Tech Solutions Pvt. Ltd.

Milpitas, CA • On-site, Remote

Full-time

Posted 11 days ago


Job description

Position: Senior ASIC DFT CDC Constraints Engineer
Location: Milpitas, CA - Remote
Contract Term: Contract
Job Description:
  • Senior Clock Domain Crossing (CDC) Contractor to support our engineering team.
  • This is critical, focused on maintaining design integrity during a transition period.
  • The ideal candidate will serve as a subject matter expert in CDC analysis and ASIC Design-for-Test (DFT) constraints.
  • leading the CDC/RDC (Clock Domain Crossing / Reset Domain Crossing) methodology in silicon one chips
  • Design & implement robust and reusable RTL with CDC/RDC considerations
  • Spec comprehensive CDC/RDC check flows and work with CAD team to implement
  • Review and approve CDC/RDC constraints and waivers
  • Perform static glitch analysis
  • Improve design with prevention of static glitch harzad.

Minimum Qualifications
  • Bachelor's or master's degree on Electrical Engineering with at least 10 years of experience on ASIC chip design
  • RTL development skills and experiences
  • Solid understanding on CDC/RDC concepts and relevant design implementation
  • Experience on maintaining CDC/RDC flow and signing-off constraints and waivers
  • Solid understanding on static glitch harzads and experience on the relevant analysis on synthesis optimized gate netlists
  • Experiences on Static Timing Analysis
  • Experiences on VCS simulation SVA (System Verilog Assertions).