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Remote Computer Chip Engineer Jobs in California

MatX

SOC Intergration Engineer

Mountain View, CA · On-site +1

$175K - $450K/yr

Collaborate closely with the Full Chip owner on the Physical Design team to incorporate necessary ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

MatX

ASIC/SOC CAD Engineer

Mountain View, CA · On-site +1

$175K - $362.50K/yr

MatX is seeking a Physical Design CAD Engineer to join our team as we create best-in-class silicon ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

Mercor

Design Verification Engineer

San Jose, CA · Remote

$100 - $175/hr

RTL Design Engineers Type: Contract Compensation: $100-$175/hour Location ... Remote Duration: 3+ months Commitment: 40 hours/week Role Responsibilities * Evaluate digital chip ...

New

MatX

System Software Engineer

Mountain View, CA · On-site +1

$175K - $362.50K/yr

Bring up and help debug issues during new chip bring-up in close collaboration with hardware ... In-depth knowledge of computer hardware and system architecture * Good understanding of low-level ...

Baidu USA

Software Engineer - Compiler

Sunnyvale, CA · On-site +1

Partially remote working is acceptable for this position. We are building a new team of exceptional ... Also, we are starting a new company to expand our chip business and deliver new innovative ...

Zoo

CAD Graphics Engine Software Engineer

Los Angeles, CA · On-site +1

$145K - $195K/yr

We are headquartered in Los Angeles, CA with both a local and remote team. We were founded and ... CAD Graphics Engine! In this role, you'll work as part of a small team of Graphics Engineers to ...

Tensordyne

Principal ASIC Architect

Sunnyvale, CA · On-site +1

Headquartered in Sunnyvale, CA, and Munich, Germany, with remote team members across North America ... An MS or PhD in Electrical Engineering, Computer Engineering or related engineering discipline. For ...

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Remote Computer Chip Engineer information

What are the key skills and qualifications needed to thrive as a Remote Computer Chip Engineer, and why are they important?

To thrive as a Remote Computer Chip Engineer, you need a strong background in electrical engineering, digital/analog circuit design, and semiconductor fundamentals, typically supported by a relevant degree. Familiarity with CAD tools like Cadence or Synopsys, experience with HDL languages (such as Verilog or VHDL), and knowledge of simulation and verification systems are essential. Excellent problem-solving, self-motivation, and effective remote communication skills set top engineers apart in virtual teams. These competencies ensure high-quality chip development, efficient collaboration, and successful project delivery in a remote work environment.

What are some common challenges faced by Remote Computer Chip Engineers, and how can they be addressed?

Remote Computer Chip Engineers often face challenges related to effective collaboration, particularly when working across different time zones or with team members in various locations. Communication about design updates, debugging, and hardware testing can require extra coordination. To address these issues, teams typically use robust project management tools, regular video meetings, and clear documentation practices. Establishing strong communication channels and proactively sharing progress help ensure everyone stays aligned and projects move forward efficiently.

What does a Remote Computer Chip Engineer do?

A Remote Computer Chip Engineer designs, develops, tests, and optimizes microchips and integrated circuits while working from a remote location. They use specialized software tools to create blueprints, simulate chip behavior, and collaborate with other engineers online. Their work is crucial in developing faster, more efficient processors and electronic devices. By working remotely, they leverage digital communication and project management tools to coordinate with teams around the world.
What are the most commonly searched types of Computer Chip Engineer jobs in California? The most popular types of Computer Chip Engineer jobs in California are:
What are popular job titles related to Remote Computer Chip Engineer jobs in California? For Remote Computer Chip Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Remote Computer Chip Engineer jobs in California look for? The top searched job categories for Remote Computer Chip Engineer jobs in California are:
What cities in California are hiring for Remote Computer Chip Engineer jobs? Cities in California with the most Remote Computer Chip Engineer job openings:
Remote Computer Chip Engineer jobs near you
Infographic showing various Remote Computer Chip Engineer job openings in California as of May 2026, with employment types broken down into 5% As Needed, 54% Full Time, 29% Part Time, and 12% Contract. Highlights an 38% Physical, 3% Hybrid, and 59% Remote job distribution.

Lead ASIC DFT Engineer - Remote

Futran Tech Solutions Pvt. Ltd.

San Jose, CA • On-site, Remote

$192.90K/yr

Full-time

Posted 28 days ago

Job description

Role: Lead ASIC DFT Engineer
Location: San Jose, CA
Work Setup: Remote, PST time zone preferred
Contract Term: Contract
Experience Required:
  • 10+ years of hands-on experience in ASIC Design-for-Test (DFT)

Role Summary:
We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.
Key Skills Required:
  • Strong hands-on ASIC DFT experience with end-to-end ownership
  • Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug
  • Experience with Synopsys, Cadence, and Siemens/Mentor EDA tools
  • Strong background in scan insertion, scan chain stitching, ATPG setup, simulation, debug, and DRC analysis
  • MBIST implementation and verification; SMS experience preferred
  • Tessent/SSN experience preferred
  • Strong understanding of PLLs, RTL design, synthesis, LEC, and physical design flows
  • Post-silicon debug and silicon bring-up experience
  • TCL, PERL, or Python scripting experience is highly preferred

I need skill metrics on:
  • DFT Architecture definition.
  • Scan & compression (EDT) implementation
  • LBIST implementation and verification
  • Coverage improvements (Spyglass work)
  • ATPG sims - timing & no timing.
  • Full chip / Sub system level DFT activities.

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