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New Grad Asic Design Verification Engineer Jobs in Utah

Imh

New Grad RN Med Surg/ICU

Salt Lake City, UT · On-site

$35.22/hr

Those hired as a New Grad RN will work under a licensed RN until license can be verified. In conjunction with working on this unit New Grad RNs attend Intermountain's one-year nurse residency program.

Employia

Software Engineer (New Grad)

Salt Lake City, UT · On-site

$90K - $160K/yr

Qualifications * 0-5 years of software engineering experience; exceptional new graduates with strong evidence of shipping are encouraged to apply. * Strong Python engineering skills. * Ability and ...

Infotech Sourcing

Design Engineer V

Logan, UT · On-site +1

... verification using Meta's Design Traveler document. Create and modify engineering tool project ... templates, meta-data, configuration data, and rules. Technical Expertise & Problem Solving: Apply a ...

Infotech Sourcing

Design Engineer V

Logan, UT · On-site

... verification using Meta's Design Traveler document. Create and modify engineering tool project ... templates, meta-data, configuration data, and rules. Technical Expertise & Problem Solving: Apply a ...

Raytheon

Senior FPGA Design Engineer

Provo, UT · On-site

$116K - $160K/yr

Designs are verified against requirements using both directed test and constrained random ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...

Raytheon

Design Verification/Qualification Test Lead

Provo, UT · On-site

$45 - $61.25/hr

Together, we push the boundaries of known science and find new ways to connect and protect our ... We bring the strength of more than 100 years of experience and renowned engineering expertise to ...

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New Grad Asic Design Verification Engineer information

What does a new grad ASIC design verification engineer do?

A New Grad ASIC Design Verification Engineer is responsible for testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they meet functional and performance specifications. They typically create testbenches, develop verification plans, write test cases using hardware description languages like SystemVerilog, and debug issues found during simulations. This role is crucial for catching design flaws before manufacturing, working closely with design engineers and using both manual and automated verification methods. As a new graduate, you will learn industry-standard verification methodologies and tools while contributing to the success of the silicon development process.

What are the key skills and qualifications needed to thrive as a new grad ASIC design verification engineer?

To thrive as a New Grad ASIC Design Verification Engineer, you need a solid understanding of digital design principles, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard verification tools and environments like SystemVerilog, UVM, and simulation/debugging platforms is typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help you excel in diagnosing issues and collaborating with design teams. These skills and qualities ensure robust verification processes that lead to functional, reliable ASIC products.

What are some common challenges new graduates face when starting as an ASIC design verification engineer, and how can they overcome them?

New grad ASIC Design Verification Engineers often encounter challenges such as understanding complex verification environments, learning industry-standard tools and methodologies like UVM, and effectively debugging hardware designs. To overcome these, it's helpful to actively seek mentorship from experienced team members, participate in code reviews, and utilize available documentation and training resources. Collaborating closely with designers and verification leads, asking questions, and consistently practicing hands-on simulations can accelerate learning and build confidence in tackling verification tasks.

What is the difference between New Grad Asic Design Verification Engineer vs New Grad Digital Design Engineer?

AspectNew Grad Asic Design Verification EngineerNew Grad Digital Design Engineer
Required SkillsHardware verification, simulation, scripting, HDL knowledgeDigital circuit design, HDL coding, logic design
Work EnvironmentVerification labs, simulation tools, hardware testingDesign teams, FPGA/ASIC development, coding
Industry UsagePrimarily in semiconductor and chip companiesBroadly in electronics, semiconductor, and tech firms

While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

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For New Grad Asic Design Verification Engineer jobs in Utah, the most frequently searched job titles are:

What job categories do people searching New Grad Asic Design Verification Engineer jobs in Utah look for?

The top searched job categories for New Grad Asic Design Verification Engineer jobs in Utah are:

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Cities in Utah with the most New Grad Asic Design Verification Engineer job openings:

New Grad Asic Design Verification Engineer jobs near you
Infographic showing various New Grad Asic Design Verification Engineer job openings in Utah as of July 2026, with employment types broken down into 86% Full Time, 11% Part Time, and 3% Contract. Highlights an 83% Physical, 4% Hybrid, and 13% Remote job distribution.

Specialist, Systems Engineer

L3HHCM20

Salt Lake City, UT

Full-time

Re-posted 16 days ago

Job description

Job Title: Specialist, Systems Engineer

Job Code: 40396

Job Location: Salt Lake City, UT

Job Schedule: 9/80 Employees work 9 out of every 14 days- totaling 80 hours working- and have every other Friday off 

Job Description:

We are seeking an experienced Systems Engineer, Specialist to support critical test and integration activities as the Lead Systems Verification Engineer for advanced communication systems programs. This role requires an engineer capable of managing multiple complex technical issues simultaneously, coordinating cross-functional failure review boards (FRBs), and driving resolution of system-level anomalies through root cause analysis and corrective action implementation. This position offers the opportunity to work on cutting-edge communication systems with direct impact on national defense capabilities. The ideal candidate thrives in dynamic environments where technical expertise, leadership, and communication skills are essential to mission success.

Essential Functions:

  • Coordinate simultaneous execution of multiple test programs including HALT (Highly Accelerated Life Testing), ESS (Environmental Stress Screening), ATP (Acceptance Test Procedures), and EME (Electromagnetic Environmental Effects) testing
  • Validate test procedures and data analysis methods against specification requirements
  • Serve as Cost Account Manager (CAM) for assigned test and integration work packages
  • Monitor and report cost performance using Earned Value Management System (EVMS) metrics (BCWS, BCWP, ACWP, CPI, SPI)
  • Interface with Program Management Office (PMO) for procurement of critical test equipment and materials
  • Oversee DVT (Design Verification Test) report generation and technical documentation
  • Coordinate with cross-functional teams including design engineering, manufacturing, and quality assurance
  • Manage test resource allocation and scheduling conflicts across parallel test activities
  • Up to 5% travel required
  • Have an Active DoD Secret Clearance


Qualifications:

  • Bachelor's degree in Systems Engineering, Electrical Engineering, Computer Engineering, or related technical field with 4 years of experience, or a Master's degree with 2 years of experience


Preferred Additional Skills:

  • Active Secret or Top Secret security clearance
  • Must be a U.S. Citizen and able to obtain/maintain required clearance
  • Strong understanding of RF/microwave systems, including transmitter/receiver architectures
  • Knowledge of environmental testing standards (MIL-STD-810, DO-160, or similar)
  • Experience with EMI/EMC testing and electromagnetic environmental effects analysis
  • Strong analytical and problem-solving skills with attention to detail
  • Excellent written and verbal communication skills for technical presentations
  • Experience working with prime contractors and government customers
  • Ability to work effectively under pressure with competing deadlines

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