SoC Design Engineer
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Quick apply
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Santa Clara, CA · On-site
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Santa Clara, CA · On-site
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
San Jose, CA · On-site
$115/hr
... or MSEE with 6+ years of related experience Experience with High Speed Network Interfaces (10G/25G/100G/400G) Experience with high-speed SERDES (>=25G) system design, signal integrity issues, and ...
San Jose, CA · On-site
$115/hr
... or MSEE with 6+ years of related experience Experience with High Speed Network Interfaces (10G/25G/100G/400G) Experience with high-speed SERDES (>=25G) system design, signal integrity issues, and ...
Santa Clara, CA · On-site
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Santa Clara, CA · On-site
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Salem, MA · Remote
$148K/yr
BSEE/MSEE or equivalent in Electrical Engineering, Computer Science, or a related field. * Proficient in Verilog/SystemVerilog and UVM. * Comfortable working in Linux and with industry-standard EDA ...
Quick apply
Salem, MA · Remote
$148K/yr
BSEE/MSEE or equivalent in Electrical Engineering, Computer Science, or a related field. * Proficient in Verilog/SystemVerilog and UVM. * Comfortable working in Linux and with industry-standard EDA ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Santa Clara, CA · On-site
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Santa Clara, CA · On-site
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
... 12+ (or MSEE with 9+) years related experience; - Extensive timing analysis experience using PrimeTime - Experience generating timing constraints from scratch for block and top levels - Formal ...
... 12+ (or MSEE with 9+) years related experience; - Extensive timing analysis experience using PrimeTime - Experience generating timing constraints from scratch for block and top levels - Formal ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Santa Clara, CA · On-site
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Santa Clara, CA · On-site
$110K - $140K/yr
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Cupertino, CA · On-site
$90K - $130K/yr
... MSEE. Salary Range: $90,000-$130,000 a year #LI-AS3
Cupertino, CA · On-site
$90K - $130K/yr
... MSEE. Salary Range: $90,000-$130,000 a year #LI-AS3
Salem, MA · Remote
$148K/yr
MSEE with 10+ years or PhD with 7+ years of verification experience.- Advanced knowledge of SystemVerilog and UVM methodology. * Proficiency in EDA tools such as VCS, Xcelium, and IMC. * Strong ...
Quick apply
Salem, MA · Remote
$148K/yr
MSEE with 10+ years or PhD with 7+ years of verification experience.- Advanced knowledge of SystemVerilog and UVM methodology. * Proficiency in EDA tools such as VCS, Xcelium, and IMC. * Strong ...
$146K - $171K/yr
Preferred MSEE or PhD preferred. BS required Knowledge of communications systems theory with strengths in analog/digital modulation/demodulation Knowledge of signal processing algorithms ...
$146K - $171K/yr
Preferred MSEE or PhD preferred. BS required Knowledge of communications systems theory with strengths in analog/digital modulation/demodulation Knowledge of signal processing algorithms ...
Santa Clara, CA · On-site
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Quick apply
Santa Clara, CA · On-site
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Santa Clara, CA · On-site
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Quick apply
Santa Clara, CA · On-site
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
Quick apply
PhD or MSEE with some experience of digital design * Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality * Knowledge of high ...
$37K - $50.3K
3% of jobs
$50.3K - $63.5K
1% of jobs
$63.5K - $76.8K
6% of jobs
$76.8K - $90.1K
7% of jobs
$96.3K is the 25th percentile. Wages below this are outliers.
$90.1K - $103.4K
15% of jobs
The median wage is $113.5K / yr.
$103.4K - $116.6K
22% of jobs
$116.6K - $129.9K
15% of jobs
$135.3K is the 75th percentile. Wages above this are outliers.
$129.9K - $143.2K
12% of jobs
$143.2K - $156.5K
7% of jobs
$156.5K - $169.7K
6% of jobs
$169.7K - $183K
4% of jobs
$37K
$117.7K
$183K
| Aspect | MSEE (Master of Science in Electrical Engineering) | Electrical Engineer |
|---|---|---|
| Credentials | Master's degree in electrical engineering | Bachelor's degree in electrical engineering or related field |
| Work Environment | Research, design, advanced development, academia | Design, testing, manufacturing, fieldwork |
| Industry Usage | Research labs, academia, specialized engineering roles | Construction, manufacturing, product development |
The MSEE is an advanced degree focusing on research and specialized knowledge, often leading to roles in R&D or academia. An Electrical Engineer typically holds a bachelor's degree and works in practical engineering tasks. While both roles are in the electrical industry, the MSEE prepares for more specialized or research-oriented positions, whereas the Electrical Engineer is more involved in implementation and design tasks.

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Software development
1,001 - 5,000 Employees
Santa Clara, CA, US
1995