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Memory Design Engineer Jobs in California (NOW HIRING)

Logic Design Engineer

Rancho Cordova, CA ยท On-site

$105K - $164K/yr

Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to ... Join Solidigm's visionary Design Engineering Team as a 3D NAND Logic Design Engineer and help shape ...

Senior Design Engineer

San Jose, CA ยท On-site

$116K - $246K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Sr. or Staff Design Engineer in the NVE Design Engineering Core group at Micron Technology ...

Senior Design Engineer

San Jose, CA ยท On-site

$116K - $246K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology ...

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in ... Because modern AI workloads push the limits of performance, memory, and efficiency, our RTL ...

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in ... Because modern AI workloads push the limits of performance, memory, and efficiency, our RTL ...

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in ... Because modern AI workloads push the limits of performance, memory, and efficiency, our RTL ...

Senior Design Engineer

San Jose, CA ยท On-site

$116K - $246K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology ...

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Design Engineer in Micron's Pathfinding Design Team, you will play a key role in shaping next ...

Senior Design Engineer

San Jose, CA ยท On-site

$116K - $246K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Sr. or Staff Design Engineer in the NVE Design Engineering Core group at Micron Technology ...

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... Job Summary As a Sr. Design Engineer in the NVE Design Engineering Core group at Micron Technology ...

Sr Design Engineer

San Jose, CA ยท On-site

$116K - $246K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... Job Summary As a Sr. Design Engineer in the NVE Design Engineering Core group at Micron Technology ...

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Memory Design Engineer information

See California salary details

$79.4K

$139.5K

$286.7K

How much do memory design engineer jobs pay per year?

As of Jun 10, 2026, the average yearly pay for memory design engineer in California is $139,500.00, according to ZipRecruiter salary data. Most workers in this role earn between $93,800.00 and $155,900.00 per year, depending on experience, location, and employer.

What are the primary challenges faced by Memory Design Engineers on a daily basis?

Memory Design Engineers often encounter challenges such as optimizing memory circuits for speed, power efficiency, and area while ensuring manufacturability and meeting reliability standards. Balancing these conflicting requirements requires strong analytical skills and close collaboration with verification, process, and layout teams. The role also involves troubleshooting design issues, staying updated with evolving semiconductor technologies, and ensuring timely project delivery. Overcoming these challenges fosters professional development and helps engineers build a solid track record in advanced technology nodes.

What are the key skills and qualifications needed to thrive in the Memory Design Engineer position, and why are they important?

A Memory Design Engineer requires a strong background in electrical engineering, semiconductor physics, and digital/analog circuit design, typically supported by a relevant bachelor's or master's degree. Expertise with EDA tools like Cadence, Synopsys, or Mentor Graphics, and familiarity with scripting languages and memory characterization tools is essential. Strong problem-solving skills, attention to detail, and effective communication are important soft skills in this role. These competencies are crucial to ensure reliable, high-performance memory designs that meet rigorous industry standards and enable smooth collaboration within multidisciplinary engineering teams.

What is a Memory Design Engineer job?

A Memory Design Engineer is responsible for designing, developing, and optimizing memory circuits such as SRAM, DRAM, or flash memory. They work on transistor-level design, layout, simulation, and verification to ensure performance, power efficiency, and reliability. Engineers collaborate with process, verification, and product teams to meet design specifications and manufacturing constraints. Their role is critical in advancing memory technology for applications in consumer electronics, computing, and enterprise solutions.

What are the most commonly searched types of Memory Design Engineer jobs in California? The most popular types of Memory Design Engineer jobs in California are:
What are popular job titles related to Memory Design Engineer jobs in California? For Memory Design Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Memory Design Engineer jobs in California look for? The top searched job categories for Memory Design Engineer jobs in California are:
What cities in California are hiring for Memory Design Engineer jobs? Cities in California with the most Memory Design Engineer job openings:
Infographic showing various Memory Design Engineer job openings in California as of June 2026, with employment types broken down into 75% Full Time, and 25% Contract. Highlights an 94% In-person, and 6% Remote job distribution, with an average salary of $139,500 per year, or $67.1 per hour.
Logic Design Engineer

Logic Design Engineer

Solidigm

Rancho Cordova, CA โ€ข On-site

$105K - $164K/yr

Full-time

This job post hasย expired today.ย Applications are no longer accepted.


Job description

Company Description
Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.
Job Description
Join Solidigm's visionary Design Engineering Team as a 3D NAND Logic Design Engineer and help shape the future of memory technology.
Job responsibilities include, but not limited to:
  • Develop and optimize microcode-based 3D NAND algorithms (read, program, erase, power-on) using proprietary instruction sets and compilers
  • Define micro-architecture specifications, implement RTL in SystemVerilog, generate synthesis netlists with appropriate constraints, perform static timing analysis, resolve violations, implement ECOs, and drive design sign-off
  • Collaborate with pre-silicon verification teams to build unit-level test benches, implement SystemVerilog Assertions (SVAs), run full-chip RTL and gate-level simulation (GLS) regressions, and ensure functional and code coverage for various read-window-budget and customer features
  • Review pre-silicon analog and mixed signal (AMS) simulations and post-silicon microprobe waveforms to conduct power & performance modeling and ensure the functionality of various digital & analog blocks
  • Partner with product engineering and technology development teams to define Read-Window-Budget (RWB) features and develop Design for Testability (DFT) methods that reduce test time and cost while improving quality
  • Support post-silicon debug and failure analysis across multiple configurations

Qualifications
  • MS in electrical or computer engineering with 5+ years of experience, or BS with 7+ years of experience
  • Hands-on experience with micro-controller architecture, instruction sets, and compilers, with the ability to design, implement, and debug micro-code for memory control algorithms (read, program, erase, initialization, power-on sequences)
  • Proven expertise in Verilog and SystemVerilog, with deep understanding of ASIC design flow: RTL design, logic synthesis, STA, ECO
  • Strong background in design verification tools and automation scripting
  • Prior experience in 3D NAND Flash Memory logic design is a plus
  • Ability to work independently across pre- and post-silicon debug cycles

Additional Information
The compensation range for this role is $105,440 - $164,800. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.
This is a Hybrid role reporting out of Rancho Cordova CA; or San Jose CA.
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