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Memory Circuit Design Jobs in California (NOW HIRING)

Nvidia

Senior Circuit Design Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

Work on the cutting edge standard cell libraries and/or custom ROM (Read Only Memory) modules in deep submicron technologies. * Drive the concepts of the transistor level standard cell circuit design ...

Nvidia

Senior Circuit Design Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

Work on the cutting edge standard cell libraries and/or custom ROM (Read Only Memory) modules in deep submicron technologies. Drive the concepts of the transistor level standard cell circuit design ...

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All JobsMemory Circuit Design JobsMemory Circuit Design Jobs in California

Memory Circuit Design information

See California salary details

$58.7K

$109.3K

$147.5K

How much do memory circuit design jobs pay per year?

As of Sep 4, 2026, the average yearly pay for memory circuit design in California is $109,344.00, according to ZipRecruiter salary data. Most workers in this role earn between $82,400.00 and $130,800.00 per year, depending on experience, location, and employer.

What is memory circuit design?

Memory circuit design is the process of creating integrated circuits that store and retrieve data in electronic devices. These circuits can include various types of memory such as SRAM, DRAM, or flash memory. Designers focus on optimizing for speed, power consumption, area, and reliability. Memory circuit designers work closely with semiconductor fabrication teams to ensure the final product meets performance and manufacturing requirements.

What are the key skills and qualifications needed to thrive as a memory circuit design engineer, and why are they important?

To thrive as a Memory Circuit Design Engineer, you need a strong background in electrical engineering, semiconductor physics, and circuit design principles, often backed by a relevant degree. Proficiency with EDA tools like Cadence, Synopsys, and SPICE simulation software, as well as knowledge of Verilog or VHDL, is typically required. Attention to detail, problem-solving abilities, and effective teamwork are crucial soft skills for this role. These competencies are vital for designing reliable, high-performance memory circuits that meet industry standards and project requirements.

What are some common challenges faced by memory circuit design engineers, and how do teams typically address them?

Memory circuit design engineers often encounter challenges related to meeting strict power, speed, and area targets while ensuring data reliability and yield. These challenges are compounded by rapid technology scaling and tight project timelines. Teams typically address them through close collaboration with process engineers, regular design reviews, and the use of advanced simulation tools to optimize and verify designs early in the development cycle. Cross-functional teamwork is essential, as designers often work closely with layout, verification, and test engineering teams to deliver high-quality memory products.

What is the difference between Memory Circuit Design vs Digital IC Design?

AspectMemory Circuit DesignDigital IC Design
Required CredentialsBachelor's or Master's in Electrical Engineering, specialized in circuit designBachelor's or Master's in Electrical Engineering, with focus on digital systems
Work EnvironmentDesigning memory modules, working in labs or design teamsDesigning digital integrated circuits, often in cleanroom environments
Industry UsageSemiconductor companies, memory chip manufacturersConsumer electronics, computing, and communication devices
Common Search/ComparisonMemory Circuit Design vs Digital IC Design

Memory Circuit Design focuses on creating memory components like RAM and flash memory, emphasizing specialized circuit techniques. Digital IC Design covers a broader range of digital integrated circuits, including processors and logic chips. While both roles require similar educational backgrounds and work environments, Memory Circuit Design is more specialized in memory technologies, whereas Digital IC Design encompasses a wider array of digital components.

What are popular job titles related to Memory Circuit Design jobs in California?

For Memory Circuit Design jobs in California, the most frequently searched job titles are:

What job categories do people searching Memory Circuit Design jobs in California look for?

The top searched job categories for Memory Circuit Design jobs in California are:

Memory Circuit Design jobs near you
Infographic showing various Memory Circuit Design job openings in California as of August 2026, with employment types broken down into 83% Full Time, 12% Part Time, and 5% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $109,344 per year, or $52.6 per hour.

Senior FPGA Circuit Design Engineer

Altera Corporation

San Jose, CA • On-site

$149K - $215K/yr

Full-time

Posted 18 days ago

Key responsibilities

  • Design and develop complex FPGA circuits and IP, including core fabric logic, interconnect, routing, clocking, configuration, memory blocks, and NoC architectures.

  • Lead microarchitecture definition and perform circuit and logic design to optimize power, performance, area, timing, reliability, and yield.

  • Perform functional and reliability verification of FPGA circuits and IP, and develop design models and collateral for integration into hardware and software deliverables.

Job description

Job Details:
Job Description:
About Altera
At Altera™, our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.
About the Role
Join Altera as a Senior FPGA Silicon Design Engineer focused on the design and development of complex FPGA circuits, programmable logic, and IP for next-generation FPGA products. In this role, you will own significant portions of FPGA architecture and implementation, including core fabric logic, interconnect and routing, clocking, configuration, configurable memory blocks, and Network-on-Chip (NoC) capabilities.
You will apply deep expertise in FPGA and/or ASIC design to micro-architect, design, simulate, and verify complex circuits and logic while optimizing designs for power, performance, area, timing, reliability, and yield. You will also develop the models, specifications, and design collateral required to integrate FPGA circuits and IP into broader hardware and software deliverables.
As a senior technical contributor, you will work closely with microarchitecture, SoC/full-chip, IP fabric and interconnect, RTL design, verification, physical design, and other engineering teams to develop new FPGA capabilities, improve programmable logic architectures, and enable efficient integration of FPGA technology into larger systems. You will independently drive complex technical assignments, influence design decisions, mentor engineers, and contribute to improved design methodologies and processes.
Key Responsibilities
  • Design and develop complex FPGA circuits and IP, including FPGA core fabric logic, interconnect and routing, clocking, configuration, configurable memory blocks, and Network-on-Chip (NoC) architectures.
  • Lead microarchitecture definition and perform circuit and logic design for complex FPGA blocks and subsystems, making technical tradeoffs to optimize power, performance, area, timing, reliability, and yield.
  • Develop schematics, RTL implementations, behavioral models, and simulations to evaluate and validate new FPGA circuit architectures and capabilities.
  • Perform functional and reliability verification of FPGA circuits and IP, working closely with verification teams to identify, debug, and resolve complex design issues.
  • Develop and maintain design models and collateral required to integrate FPGA circuits and IP into hardware and software deliverables, including circuit integration specifications, behavioral models, electrical rule checkers, design intent, timing models, and power models.
  • Analyze design results and drive improvements to meet aggressive power, performance, area (PPA), timing, reliability, and yield objectives.
  • Work closely with microarchitecture, SoC/full-chip, IP fabric and interconnect, RTL design, verification, physical design, and other cross-functional teams to integrate FPGA circuits and IP into larger systems.
  • Drive technical resolution of complex design, integration, simulation, timing, and functional issues across multiple engineering disciplines.
  • Contribute to the development of new FPGA capabilities and improved programmable logic architectures that enable faster and more efficient integration of Altera FPGAs into larger systems.
  • Lead or contribute to design methodology and flow improvements that increase design quality, development efficiency, and scalability across FPGA product generations.
  • Provide technical guidance and mentorship to less-experienced engineers and serve as a technical resource for complex FPGA circuit and IP design challenges.
  • Support silicon bring-up and post-silicon debug as needed by investigating hardware issues, validating design functionality, and applying lessons learned to future FPGA designs.

Salary Range
The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$149,100 - $215,000 USD
We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.
#LI-MD1
Qualifications:
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, Math, or a related field and 8+ years of industry experience in FPGA or ASIC design.
  • 8+ years of experience in FPGA circuit, IP, or RTL design, including development of complex digital logic, programmable logic, or silicon subsystems.
  • 8+ years of experience in microarchitecture and logic design for complex digital systems, including experience with FPGA fabric, interconnects, routing, clocking, configuration, memory structures, processor subsystems, or Network-on-Chip (NoC) architectures.
  • 8+ years of experience with hardware design and simulation methodologies, including schematic entry, RTL development, behavioral modeling, circuit simulation, functional verification, or related front-end design methodologies.
  • 8+ years of experience using industry-standard FPGA or ASIC design tools and flows, including simulation, synthesis, static timing analysis (STA), linting, design-rule or electrical-rule checking, and power analysis.
  • 8+ years of experience developing or analyzing timing, power, performance, area, reliability, or yield characteristics of FPGA or ASIC circuits and IP.
  • 8+ years of experience developing design models, specifications, or technical collateral used to integrate FPGA circuits or IP into larger hardware and software systems.
  • 8+ years of experience collaborating with cross-functional engineering teams, including microarchitecture, SoC/full-chip, IP, interconnect/fabric, RTL design, verification, physical design, and/or silicon validation teams.
  • 8+ years of experience independently driving complex technical assignments, resolving design and integration issues, and influencing technical decisions across multiple engineering disciplines.

Preferred Qualifications
  • 8+ years of experience specifically designing or implementing FPGA routing, interconnect, or programmable fabric architectures.
  • 8+ years of experience with FPGA core fabric logic, configurable memory blocks, clocking architectures, configuration logic, or Network-on-Chip (NoC) architectures.
  • 8+ years of experience developing FPGA circuit models, timing models, power models, behavioral models, electrical-rule checking methodologies, or other design collateral.
  • 8+ years of experience contributing to FPGA or ASIC silicon development through design, verification, integration, tape-out, silicon bring-up, or post-silicon validation.
  • 8+ years of experience working across hardware and software interfaces to enable integration of FPGA circuits and IP into larger SoC or system architectures.
  • Demonstrated experience mentoring engineers and providing technical leadership on complex FPGA circuit, IP, or architecture challenges.

Job Type:
Regular
Shift:
Shift 1 (United States of America)
Primary Location:
San Jose, California, United States
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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