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Mask Layout Designer Jobs (NOW HIRING)

Verify the physical layout design to meet both circuit design requirements and process requirements * Execute mask data release and archiving * Use new tools and methods and work with CAD/CAE to ...

... mask fabrication and design rules (DRC) o Software/Tool Proficiency • Experience with OPC/Mask ... designs based on customer/internal feedback • Ability to read and understand English technical ...

Senior Quantum Analog Layout Engineer

Redmond, WA · On-site

$123K - $165K/yr

... designs. Microsoft's mission is to empower every person and every organization on the planet to ... Develop plans for Analog Mask Layout execution and follow processes and methodologies to deliver IP ...

Requisition ID: 77944 Description Skyworks' Greensboro Design Center is seeking a Sr. Principal IC Layout Designer to lead the physical design of analog and RF integrated circuits using commercial ...

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Mask Layout Designer information

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$10

$41

$100

How much do mask layout designer jobs pay per hour?

As of Aug 15, 2026, the average hourly pay for mask layout designer in the United States is $41.30, according to ZipRecruiter salary data. Most workers in this role earn between $17.55 and $58.41 per hour, depending on experience, location, and employer.

What is a mask layout designer?

Mask layout designers are professionals who create the detailed physical layouts for integrated circuits (ICs) or semiconductor devices. They translate circuit schematics into precise geometric patterns that define how components and connections will be fabricated on silicon chips. Their work involves using specialized software tools to optimize the arrangement for performance, manufacturability, and adherence to design rules. Mask layout designers play a crucial role in ensuring that electronic devices function correctly and efficiently.

What are the key skills and qualifications needed to thrive as a mask layout designer?

To thrive as a Mask Layout Designer, you need a solid understanding of semiconductor physics, IC design principles, and experience with layout design rules, usually supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys, as well as knowledge of DRC/LVS verification processes, is essential. Attention to detail, problem-solving, and effective collaboration with design and verification teams are valuable soft skills. These competencies ensure the creation of accurate, manufacturable layouts that meet stringent specifications, directly impacting chip performance and yield.

What is the difference between Mask Layout Designer vs IC Design Engineer?

AspectMask Layout DesignerIC Design Engineer
Primary FocusDesigning photomask layouts for semiconductor manufacturingDesigning integrated circuit architectures and circuit components
Skills & CertificationsKnowledge of mask design tools, semiconductor fabrication processesStrong circuit theory, EDA tools, and semiconductor device knowledge
Work EnvironmentSemiconductor fabrication facilities, design labsDesign offices, R&D labs, semiconductor companies
Industry UsageUsed in photomask manufacturing for chip productionUsed in chip and circuit development for various electronic devices

While both roles are integral to semiconductor development, the Mask Layout Designer focuses on creating precise photomask patterns for manufacturing, whereas the IC Design Engineer develops the overall circuit architecture and logic. Understanding these distinctions helps professionals and employers align skills and expectations in the semiconductor industry.

What are some common challenges faced by mask layout designers when collaborating with circuit design engineers?

One common challenge Mask Layout Designers face is translating circuit schematics into efficient and manufacturable layouts while ensuring all design rules and constraints are met. Effective communication is crucial, as discrepancies between layout and circuit intent can arise, requiring iterative feedback and close coordination with circuit design engineers. Additionally, balancing performance, area, and manufacturability often involves trade-offs, making teamwork and proactive problem-solving essential parts of the role.
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What cities are hiring for Mask Layout Designer jobs?

Cities with the most Mask Layout Designer job openings:

What states have the most Mask Layout Designer jobs?

States with the most job openings for Mask Layout Designer jobs include:

Infographic showing various Mask Layout Designer job openings in the United States as of August 2026, with employment types broken down into 1% Internship, 81% Full Time, 13% Part Time, 2% Contract, and 3% Nights. Highlights an 94% Physical, 2% Hybrid, and 4% Remote job distribution, with an average salary of $85,906 per year, or $41.3 per hour.

Full-time

Posted 22 days ago


Job description

Job Description

The Rad Hard Precision Design Group is seeking an experienced mask designer to join the team in either the Research Triangle Park, NC or the Palm Bay, FL locations. The purpose of this position is to create top-level and cell-level layouts for our Rad Hard product development team targeted toward Space markets. The Rad Hard developments include power management products, precision analog products and digital core layouts along with digital library development for new process variants. The candidate will utilize the Cadence tool set and requires interaction with circuit designers, layout designers, and CAD team.

Responsibilities:

  • Work at multiple levels of hierarchy from top-level layout floor planning to macro/block level routing
  • Work closely with circuit designers to build physical design floorplan and create package bond diagrams
  • Create high performance custom analog and mixed signal cell layout and verification
  • Complete the physical layout design with the constraints of circuit design requirements
  • Verify the physical layout design to meet both circuit design requirements and process requirements
  • Execute mask data release and archiving
  • Use new tools and methods and work with CAD/CAE to improve layout design quality and efficiency
Qualifications
  • Minimum fifteen years experience working with analog, power or mixed signal IC layouts
  • A good working knowledge of IC layout methodologies, flows and CAD tools such as Cadence Virtuoso layout physical verification
  • Basic understanding of electronic principles dealing with circuit and layout design
  • Previous experience with BCD and SOI processes.
  • Good communication skills
  • Familiar with device physics is preferred
Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on worldleading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.