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Mask Layout Designer Jobs in California (NOW HIRING)

Mask Layout Contractor

Cupertino, CA ยท On-site

$137.76 - $158.42/hr

Work closely with circuit designers to co-optimize performance, area and robustness. * Contribute to methodology improvements, including layout automation and SKILL-based flows. Required Skills

New

Senior Layout Designer

San Jose, CA ยท On-site

$86.10 - $165.31/hr

Layout/Mask Designer E2 - Layout/Mask Designer E3 Relocation Level: TBD Compensation The US base salary range that Micron Technology estimates it could pay for this full-time position is: $62.50 ...

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Mask Layout Designer information

See California salary details

$9

$40

$99

How much do mask layout designer jobs pay per hour?

As of Sep 4, 2026, the average hourly pay for mask layout designer in California is $40.76, according to ZipRecruiter salary data. Most workers in this role earn between $17.31 and $57.64 per hour, depending on experience, location, and employer.

What is a mask layout designer?

Mask layout designers are professionals who create the detailed physical layouts for integrated circuits (ICs) or semiconductor devices. They translate circuit schematics into precise geometric patterns that define how components and connections will be fabricated on silicon chips. Their work involves using specialized software tools to optimize the arrangement for performance, manufacturability, and adherence to design rules. Mask layout designers play a crucial role in ensuring that electronic devices function correctly and efficiently.

What are the key skills and qualifications needed to thrive as a mask layout designer?

To thrive as a Mask Layout Designer, you need a solid understanding of semiconductor physics, IC design principles, and experience with layout design rules, usually supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys, as well as knowledge of DRC/LVS verification processes, is essential. Attention to detail, problem-solving, and effective collaboration with design and verification teams are valuable soft skills. These competencies ensure the creation of accurate, manufacturable layouts that meet stringent specifications, directly impacting chip performance and yield.

What are some common challenges faced by mask layout designers when collaborating with circuit design engineers?

One common challenge Mask Layout Designers face is translating circuit schematics into efficient and manufacturable layouts while ensuring all design rules and constraints are met. Effective communication is crucial, as discrepancies between layout and circuit intent can arise, requiring iterative feedback and close coordination with circuit design engineers. Additionally, balancing performance, area, and manufacturability often involves trade-offs, making teamwork and proactive problem-solving essential parts of the role.

What is the difference between Mask Layout Designer vs IC Design Engineer?

AspectMask Layout DesignerIC Design Engineer
Primary FocusDesigning photomask layouts for semiconductor manufacturingDesigning integrated circuit architectures and circuit components
Skills & CertificationsKnowledge of mask design tools, semiconductor fabrication processesStrong circuit theory, EDA tools, and semiconductor device knowledge
Work EnvironmentSemiconductor fabrication facilities, design labsDesign offices, R&D labs, semiconductor companies
Industry UsageUsed in photomask manufacturing for chip productionUsed in chip and circuit development for various electronic devices

While both roles are integral to semiconductor development, the Mask Layout Designer focuses on creating precise photomask patterns for manufacturing, whereas the IC Design Engineer develops the overall circuit architecture and logic. Understanding these distinctions helps professionals and employers align skills and expectations in the semiconductor industry.

What are popular job titles related to Mask Layout Designer jobs in California?

For Mask Layout Designer jobs in California, the most frequently searched job titles are:

What job categories do people searching Mask Layout Designer jobs in California look for?

The top searched job categories for Mask Layout Designer jobs in California are:

What cities in California are hiring for Mask Layout Designer jobs?

Cities in California with the most Mask Layout Designer job openings:

Infographic showing various Mask Layout Designer job openings in California as of August 2026, with employment types broken down into 1% Internship, 76% Full Time, 17% Part Time, 4% Contract, and 2% Nights. Highlights an 92% Physical, 3% Hybrid, and 5% Remote job distribution, with an average salary of $84,781 per year, or $40.8 per hour.

Mask Layout Contractor

Mojo Vision

Cupertino, CA โ€ข On-site

$137.76 - $158.42/hr

Other

Posted 3 days ago

New


Job description

Mojo Vision is pioneering a highly flexible, wafers-in, wafers-out micro-LED platform to unlock AI applications in multiple market segments. Built over nine years by our skilled engineers, our system-level process combines advanced 300mm silicon architecture with GaN-on Silicon emitters, proprietary quantum dots, and micro-lens arrays to solve conventional trade-offs in size, brightness, bandwidth density, and power. Our scalable, manufacturing-ready approach enables breakthrough products such as AI glasses and next-generation optical interconnects.

At Mojo, our team includes talented professionals with expertise in product design, user experience, applied physics, hardware, software, optics, photonics, electronics, chemistry, and vision science.

We are a startup founded by technology experts with decades of experience developing pioneering products and platforms backed by some of the world's leading technology investors in Cupertino, CA.

Roles and Responsibilities

We are looking for an experienced analog layout contractor to join us full-time from May 2026. The perfect candidate will have extensive experience in analog layout in state-of-the-art FinFet nodes. This role requires deep hands-on layout expertise and a strong understanding of advanced node effects. Familiarity with SKILL coding is a plus. The candidate should have working knowledge of UNIX and be self-sufficient. Communication is key to success in this role.

  • Design and implement complex layout for mixed signal and analog circuits in advanced FinFet technologies (e.g. 5nm, 3nm or similar).
  • Own layout development in IP/block level, with awareness of chip-top integration constraints.
  • Optimize layout for area, matching, parasitics, reliability and manufacturability.
  • Work closely with circuit designers to co-optimize performance, area and robustness.
  • Contribute to methodology improvements, including layout automation and SKILL-based flows.
Required Skills
  • Proven experience in custom analog layout design in advanced FinFET nodes
  • Strong understanding of layout dependent effects across technology nodes (e.g., LOD, WPE, stress effects) and advanced node constraints such as multi-patterning, fin quantization, and restrictive design rules.
  • Must recognize failure prone circuit and layout structures, have experience with analog and DFM best practices, and proactively work with circuit designer for best approach to problems.
  • Expertise in Cadence Virtuoso (Layout XL or equivalent) and Calibre (or equivalent) for physical verification.
Preferred Skills
  • Excellent communication skills and ability to work independently in a fast-moving environment
  • Experience with high speed I/Os, image sensors or pixel arrays
  • High level of proficiency in interpretation of Calibre, LVS, DRC, ERC results. Proficiency in SKILL coding and layout automation
  • Work across IP, chip-top and cross-layer integration (CMOS + GaN)

Hourly Rate: $100-115 based on experience

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