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Manager Analog Layout Jobs (NOW HIRING)

Superbeo

Analog Layout Design Engineer

Santa Clara, CA · On-site

$237.20K/yr

Job Title: Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 ... Able to Delegate and Empower team along with Effective Time Management. * Working with the circuit ...

Apple

Analog Layout Automation Engineer

Austin, TX

$154.60K - $274.90K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of ... Experience using advanced Cadence Virtuoso features (XL, EAD, APR, Constraint Manager), and ...

Apple

Analog Layout Automation Engineer

Austin, TX

$154.60K - $274.90K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of ... Experience using advanced Cadence Virtuoso features (XL, EAD, APR, Constraint Manager), and ...

Apple

Analog Layout Automation Engineer

Austin, TX

$154.60K - $274.90K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of ... Experience using advanced Cadence Virtuoso features (XL, EAD, APR, Constraint Manager), and ...

Marvell

Senior Analog Layout Manager

San Diego, CA

Minimum 10+ years in analog layout design and 3+ years in management. * Deep understanding of layout methodology from initial chip planning to tape-out. * Experience with advanced process technology ...

Micron

Staff Layout Engineer, DDEG

Boise, ID

Preferred Qualifications: * 3+ years of semiconductor custom/memory/analog layout experience with demonstrated block/project leadership, including mentoring and schedule management. * DRAM/LPDDR/HBM ...

Micron

Staff Layout Engineer, DDEG

Boise, ID · On-site

Preferred Qualifications: * 3+ years of semiconductor custom/memory/analog layout experience with demonstrated block/project leadership, including mentoring and schedule management. * DRAM/LPDDR/HBM ...

SpaceX

RFIC Layout Designer (RFIC Engineering)

Redmond, WA · On-site

$115K - $145K/yr

Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing ... Experience managing revision control systems * Experience with circuit design * Understanding of ...

Micron Technology

Sr Layout Engineer, DDEG

Boise, ID · On-site

Preferred Qualifications: * 3+ years of semiconductor custom/memory/analog layout experience with demonstrated block/project leadership, including mentoring and schedule management. * DRAM/LPDDR/HBM ...

Micron Technology

Staff Layout Engineer, DDEG

Boise, ID · On-site

Preferred Qualifications: * 3+ years of semiconductor custom/memory/analog layout experience with demonstrated block/project leadership, including mentoring and schedule management. * DRAM/LPDDR/HBM ...

Micron

Staff Layout Engineer, DDEG

Boise, ID · On-site

Preferred Qualifications: * 3+ years of semiconductor custom/memory/analog layout experience with demonstrated block/project leadership, including mentoring and schedule management. * DRAM/LPDDR/HBM ...

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How much do manager analog layout jobs pay per year?

As of May 31, 2026, the average yearly pay for manager analog layout in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Manager Analog Layout, and why are they important?

To thrive as a Manager Analog Layout, you need deep expertise in analog and mixed-signal IC layout, semiconductor device physics, and a relevant engineering degree. Proficiency with EDA tools like Cadence Virtuoso and knowledge of DRC/LVS verification processes are essential, along with experience in leading layout teams. Strong leadership, communication, and problem-solving skills help you coordinate teams, resolve design challenges, and ensure project timelines are met. These skills and qualities are crucial for delivering high-quality, manufacturable chip designs that meet performance and reliability standards in a competitive market.

What are typical collaboration points between a Manager Analog Layout and other engineering teams during a project lifecycle?

As a Manager Analog Layout, you will frequently collaborate with circuit design engineers to review schematics and finalize layout requirements, ensuring that designs meet both performance and manufacturability targets. Close coordination with verification and test engineering teams is also common, especially when addressing design rule checks (DRC) and layout-versus-schematic (LVS) issues. Additionally, you may work with project managers to align layout schedules with broader project milestones, and occasionally interact with process engineers to optimize layouts for fabrication. Effective communication and teamwork across these disciplines are essential for delivering high-quality integrated circuit designs on time.

What are Manager Analog Layouts?

A Manager Analog Layout oversees the design and development of analog and mixed-signal integrated circuit (IC) layouts. They lead teams of layout engineers, ensuring that circuit designs meet technical specifications, industry standards, and project timelines. Their responsibilities include managing layout processes, collaborating with design and verification teams, reviewing layouts for quality and manufacturability, and providing technical guidance. This role is critical in industries like semiconductors, where precision and performance in analog circuits are essential.

What is the difference between Manager Analog Layout vs Analog IC Design Engineer?

AspectManager Analog LayoutAnalog IC Design Engineer
Primary focusLeading layout teams, project managementDesigning analog circuits, schematic development
Required skillsLayout expertise, leadership, coordinationCircuit design, simulation, schematic capture
Work environmentTeam management, collaboration with design and layout teamsDesign labs, simulation tools, schematic editors
Certifications/credentialsEE degree, experience in layout and project managementEE degree, circuit design experience, possibly certifications in IC design

The Manager Analog Layout primarily oversees layout teams and project execution, focusing on leadership and coordination. In contrast, the Analog IC Design Engineer concentrates on circuit design and schematic development. Both roles require strong EE backgrounds, but their daily tasks and responsibilities differ significantly, with the manager focusing on team management and the engineer on technical design.

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Manager Analog Layout jobs near you

Analog Layout Design Engineer

Superbeo

Santa Clara, CA • On-site

$237.20K/yr

Contractor

Posted 24 days ago

Job description

Job Title: Analog Layout Design Engineer
Job location: Santa Clara, CA, 95054
Job Duration: 3 Months, Contract to Hire
Job Description:
  • Experience with layout of cutting-edge high-performance, high-speed CMOS integrated circuits in older foundry CMOS process nodes in 40nm, 55nm, 65nm and 130nm following best practices from the industry.
  • Reviewing and analyzing floorplans and complex circuits with circuit designers
  • Running complete set of design verification tools available on AMS blocks
  • Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout
  • Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area, and power requirements
  • Be a great role model, by inspiring and motivating team, and Establishing Effective Organizational Structure and Communication Protocols. Able to Delegate and Empower team along with Effective Time Management.
  • Working with the circuit designer or Layout-Lead to plan/schedule work and negotiate any layout trade-offs as needed
Qualifications:
  • 10+ years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3+ years of recent experience on advance nodes including FinFET technologies
  • Experience with and knowledge of analog/mixed-signal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)
  • Experience leading complex layout macros during the full design cycle from floorplan analysis to completion of physical design verification
  • Great understanding of CAD flows and tools related to analog/mixed-signal layout design
  • Experience crafting well-matched, low noise, and low power analog blocks consisting of transistors, resistors, capacitors, pad IO's, ESD structures, etc.
  • High level of proficiency in custom, as well as standard cell-based, floorplanning and hierarchical layout assembly
  • Must understand issues of IR drop, RC delay, electro-migration, self-heating and coupling capacitance
  • Must recognize failure prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer or layout lead for the best approach to problems
  • High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports
  • Knowledge of CADENCE or MENTOR GRAPHICS layout tools.
  • Excellent interpersonal skills and able to work with remote teams
  • Synopsys/Cadence/Mentor Layout tools (Preference: 5)
  • Python (Preference: 3)
  • TSMC 7nm or 5nm (Preference: 3)
  • TSMC 3nm (Preference: 5)