Melbourne, FL · On-site
$114K - $151K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
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Melbourne, FL · On-site
$114K - $151K/yr
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
This is an entry level FPGA Engineer 1 role. This role is onsite, in Melbourne, FL. What You Will ... and work on ASIC/FPGA/MPSoC digital architecture development and design. * You will develop RTL ...
New
This is an entry level FPGA Engineer 1 role. This role is onsite, in Melbourne, FL. What You Will ... and work on ASIC/FPGA/MPSoC digital architecture development and design. * You will develop RTL ...
New
This is an entry level FPGA Engineer 1 role. This role is onsite, in Melbourne, FL. What You Will ... and work on ASIC/FPGA/MPSoC digital architecture development and design. * You will develop RTL ...
New
This is an entry level FPGA Engineer 1 role. This role is onsite, in Melbourne, FL. What You Will ... and work on ASIC/FPGA/MPSoC digital architecture development and design. * You will develop RTL ...
New
This is an entry level FPGA Engineer 1 role. This role is onsite, in Melbourne, FL. What You Will ... and work on ASIC/FPGA/MPSoC digital architecture development and design. * You will develop RTL ...
New
This is an entry level FPGA Engineer 1 role. This role is onsite, in Melbourne, FL. What You Will ... and work on ASIC/FPGA/MPSoC digital architecture development and design. * You will develop RTL ...
New
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Quick apply
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Melbourne, FL · On-site
$69 - $131/hr
ASIC/FPGA/MPSoC digital architecture development and design. * Develop RTL design code and ... Communicate well with a wide variety of individuals including Engineering, Program Management ...
New
Melbourne, FL · On-site
$69 - $131/hr
ASIC/FPGA/MPSoC digital architecture development and design. * Develop RTL design code and ... Communicate well with a wide variety of individuals including Engineering, Program Management ...
New
Orlando, FL · On-site
$148K - $275K/yr
Standard You will be the ASIC & FPGA Engineer for the Hardware Engineering team at Lockheed Martin ... Develop complex FPGA designs, including specification, design, verification, and implementation ...
Orlando, FL · On-site
$148K - $275K/yr
Standard You will be the ASIC & FPGA Engineer for the Hardware Engineering team at Lockheed Martin ... Develop complex FPGA designs, including specification, design, verification, and implementation ...
Orlando, FL · On-site
$148K - $275K/yr
Standard You will be the ASIC & FPGA Engineer for the Hardware Engineering team at Lockheed Martin ... Collaborate with the team through the Design Architecture development process * Datalink and ...
Orlando, FL · On-site
$148K - $275K/yr
Standard You will be the ASIC & FPGA Engineer for the Hardware Engineering team at Lockheed Martin ... Collaborate with the team through the Design Architecture development process * Datalink and ...
Orlando, FL · On-site
$114K - $158K/yr
ASIC & FPGA Design Engineering Job location: Orlando, FL - MFC Job duration: 02/26/2024 to 02/24/25 Job clearance: Interim Secret Clearance Required prior to start Work Schedule: 4/10A-1st Shift ...
Orlando, FL · On-site
$114K - $158K/yr
ASIC & FPGA Design Engineering Job location: Orlando, FL - MFC Job duration: 02/26/2024 to 02/24/25 Job clearance: Interim Secret Clearance Required prior to start Work Schedule: 4/10A-1st Shift ...
$111K - $142K/yr
Job Title: Specialist, Electrical Engineer (FPGA) Job Code: EE3 Job Location: Palm Bay, FL Job ... Strong RTL design skills in VHDL and/or Verilog/SystemVerilog. * Practical experience writing and ...
$111K - $142K/yr
Job Title: Specialist, Electrical Engineer (FPGA) Job Code: EE3 Job Location: Palm Bay, FL Job ... Strong RTL design skills in VHDL and/or Verilog/SystemVerilog. * Practical experience writing and ...
Analog, Digital, and RF Circuit Design. 6. ASIC DFT Engineer Location: 100% Remote | Status: All Visas Welcome Key Skills: ASIC, Design-for-Test (DFT), SCAN, ATPG.
Analog, Digital, and RF Circuit Design. 6. ASIC DFT Engineer Location: 100% Remote | Status: All Visas Welcome Key Skills: ASIC, Design-for-Test (DFT), SCAN, ATPG.
$107.50 - $120/hr
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
$107.50 - $120/hr
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
Miami, FL · On-site
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
Miami, FL · On-site
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
$117K - $162K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
$117K - $162K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
$114K - $158K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
$114K - $158K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
$114K - $158K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
$114K - $158K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
$117K - $162K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
$117K - $162K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... Experience with integration and debug of FPGA/ASIC devices * Radar processing techniques * Image ...
| Aspect | Locum Asic Rtl Design Engineer | Contract Asic Rtl Design Engineer |
|---|---|---|
| Credentials | Typically requires relevant engineering degrees and RTL design experience | Similar credentials, often with specific RTL design certifications |
| Work Environment | Temporary, short-term assignments often in multiple locations | Project-based roles, usually in a fixed location or remote |
| Employer Usage | Used by agencies or companies needing immediate, short-term expertise | Engaged by companies or staffing agencies for project-specific work |
Both roles involve RTL design skills for ASIC development, but a Locum Asic Rtl Design Engineer typically fills short-term, temporary positions, often through staffing agencies, while a Contract Asic Rtl Design Engineer is engaged for specific projects with defined durations. The main difference lies in the nature and duration of employment, but both require similar technical credentials and work environments.
The most popular types of Asic Rtl Design Engineer jobs in Florida are:
For Locum Asic Rtl Design Engineer jobs in Florida, the most frequently searched job titles are:
The top searched job categories for Locum Asic Rtl Design Engineer jobs in Florida are:
Cities in Florida with the most Locum Asic Rtl Design Engineer job openings:
$114K - $151K/yr
Contractor
Re-posted 27 days ago
Title: Hardware Engineer/ Electrical Engineer (DO-254)
Melbourne, FL – Onsite – High Priority
Visa: Any visa
Positions: 2
Position type: FTE/Contract (Open)
Client: Aerospace
Note: Candidate should be able to do coordination with offshore/ remote team and give (DO-254 process related documents) guidance to the verification team.
Expert‑level verification engineer with strong SystemVerilog and UVM experience. As an alternative to SystemVerilog/UVM, we are open to candidates with a verification background in lab testing and/or design verification testing. Experience with design on Xilinx products would be a strong plus.
Required Skills:
Core Responsibilities
Key Qualifications
Required Skills
Years of experience
Hardware Verification
System Verilog and/or UVM
FPGA verification in lab testing and/or Hardware FPGA design verification testing
Must have DO-254
Candidate should be able to do coordination with offshore/ remote team and give (DO-254 process related documents) guidance to the verification team.
Design on Xilinx products is strong plus
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It services
51 - 200 Employees
Sheridan, WY, US
