RTL Design Engineer Building AI chips that are hard-coded for individual model architectures. RTL ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
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RTL Design Engineer Building AI chips that are hard-coded for individual model architectures. RTL ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
ASIC Design Engineer Responsibilities: * Define and bring up FPGA platforms for pre-silicon ... Map ASIC RTL to FGPA while minimizing code base differences * Create and execute test plans for ...
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ASIC Design Engineer Responsibilities: * Define and bring up FPGA platforms for pre-silicon ... Map ASIC RTL to FGPA while minimizing code base differences * Create and execute test plans for ...
ASIC Digital Design, Sr Manager
Sunnyvale, CA · On-site +1
$204K - $306K/yr
... RTL, reviewing detailed design implementations, and guiding engineers through complex debug and ... Leading and managing a team of ASIC digital design engineers, providing daytoday technical guidance ...
ASIC Digital Design, Sr Manager
Sunnyvale, CA · On-site +1
$204K - $306K/yr
... RTL, reviewing detailed design implementations, and guiding engineers through complex debug and ... Leading and managing a team of ASIC digital design engineers, providing daytoday technical guidance ...
ASIC Design Engineer lll
Sunnyvale, CA · On-site
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will ... Perform RTL linting, CDC analysis, synthesis, and timing closure support. * Develop design ...
ASIC Design Engineer lll
Sunnyvale, CA · On-site
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will ... Perform RTL linting, CDC analysis, synthesis, and timing closure support. * Develop design ...
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will ... Perform RTL linting, CDC analysis, synthesis, and timing closure support. * Develop design ...
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will ... Perform RTL linting, CDC analysis, synthesis, and timing closure support. * Develop design ...
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will ... Perform RTL linting, CDC analysis, synthesis, and timing closure support. * Develop design ...
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will ... Perform RTL linting, CDC analysis, synthesis, and timing closure support. * Develop design ...
TPU RTL Design Engineer
Sunnyvale, CA · On-site
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 2 years of experience in ASIC RTL design, with a focus on ...
TPU RTL Design Engineer
Sunnyvale, CA · On-site
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 2 years of experience in ASIC RTL design, with a focus on ...
ASIC / VLSI ENGINEERS - RTL / STA / PD / DV (Senior Level) We are hiring 4 experienced ASIC / VLSI ... RTL Engineer (Networking / Ethernet) * STA Engineer * Physical Design Engineer * Design ...
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ASIC / VLSI ENGINEERS - RTL / STA / PD / DV (Senior Level) We are hiring 4 experienced ASIC / VLSI ... RTL Engineer (Networking / Ethernet) * STA Engineer * Physical Design Engineer * Design ...
RTL Design Engineer
Cupertino, CA · On-site
$2K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
RTL Design Engineer
Cupertino, CA · On-site
$2K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
RTL Design Engineer
Cupertino, CA · On-site
$2K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
RTL Design Engineer
Cupertino, CA · On-site
$2K/mo
RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 4 years of experience in ASIC RTL design, with a focus on ...
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 4 years of experience in ASIC RTL design, with a focus on ...
Knowledge of ASIC flow, SerDes, and scripting. About the job In this role, you'll work to shape the ... As a PCIe Design Engineer, you will architect and implement SoC-level RTL for our next-generation ...
Knowledge of ASIC flow, SerDes, and scripting. About the job In this role, you'll work to shape the ... As a PCIe Design Engineer, you will architect and implement SoC-level RTL for our next-generation ...
RTL Design Engineer (Silicon Engineering)
$140K - $175K/yr
RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building ... Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level ...
RTL Design Engineer (Silicon Engineering)
$140K - $175K/yr
RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building ... Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level ...
16218 - ASIC Digital Design, Sr Manager
Sunnyvale, CA · On-site
$204K - $306K/yr
General Information Job Title ASIC Digital Design, Sr Manager Job ID 16218 City Sunnyvale State ... RTL, reviewing detailed design implementations, and guiding engineers through complex debug and ...
16218 - ASIC Digital Design, Sr Manager
Sunnyvale, CA · On-site
$204K - $306K/yr
General Information Job Title ASIC Digital Design, Sr Manager Job ID 16218 City Sunnyvale State ... RTL, reviewing detailed design implementations, and guiding engineers through complex debug and ...
Lead RTL Design Engineer
Sunnyvale, CA · Hybrid
$175K - $275K/yr
About The Role As a lead front-end design engineer, you will be a key part of the world-class team ... The role also requires close collaboration and management of external ASIC vendor. You will ...
Lead RTL Design Engineer
Sunnyvale, CA · Hybrid
$175K - $275K/yr
About The Role As a lead front-end design engineer, you will be a key part of the world-class team ... The role also requires close collaboration and management of external ASIC vendor. You will ...
Power Engineer (RTL Design)
Sunnyvale, CA · On-site
ASIC/SOC power engineers with experience on tools like PTPX / RTL-A. • We are seeking a highly skilled and motivated Contract Worker for RTL Design and Verification with expertise in power ...
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Power Engineer (RTL Design)
Sunnyvale, CA · On-site
ASIC/SOC power engineers with experience on tools like PTPX / RTL-A. • We are seeking a highly skilled and motivated Contract Worker for RTL Design and Verification with expertise in power ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ... The ideal candidate has hands-on experience across the full ASIC development cycle -- from RTL ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ... The ideal candidate has hands-on experience across the full ASIC development cycle -- from RTL ...
ASIC Design Engineer - Pixel IP DMA
$147K - $272K/yr
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
ASIC Design Engineer - Pixel IP DMA
$147K - $272K/yr
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to ... Minimum 10+ years of ASIC RTL design and/or architecture experience * Proven track record with the ...
We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to ... Minimum 10+ years of ASIC RTL design and/or architecture experience * Proven track record with the ...
ASIC Design Engineer - Pixel IP DMA
$126K - $190K/yr
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
ASIC Design Engineer - Pixel IP DMA
$126K - $190K/yr
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
Locum Asic Rtl Design Engineer information
What is the difference between Locum Asic Rtl Design Engineer vs Contract Asic Rtl Design Engineer?
| Aspect | Locum Asic Rtl Design Engineer | Contract Asic Rtl Design Engineer |
|---|---|---|
| Credentials | Typically requires relevant engineering degrees and RTL design experience | Similar credentials, often with specific RTL design certifications |
| Work Environment | Temporary, short-term assignments often in multiple locations | Project-based roles, usually in a fixed location or remote |
| Employer Usage | Used by agencies or companies needing immediate, short-term expertise | Engaged by companies or staffing agencies for project-specific work |
Both roles involve RTL design skills for ASIC development, but a Locum Asic Rtl Design Engineer typically fills short-term, temporary positions, often through staffing agencies, while a Contract Asic Rtl Design Engineer is engaged for specific projects with defined durations. The main difference lies in the nature and duration of employment, but both require similar technical credentials and work environments.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in California? The most popular types of Asic Rtl Design Engineer jobs in California are:
What are popular job titles related to Locum Asic Rtl Design Engineer jobs in California? For Locum Asic Rtl Design Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Locum Asic Rtl Design Engineer jobs in California look for? The top searched job categories for Locum Asic Rtl Design Engineer jobs in California are:
What cities in California are hiring for Locum Asic Rtl Design Engineer jobs? Cities in California with the most Locum Asic Rtl Design Engineer job openings:
Job description
RTL Design Engineer
Building AI chips that are hard-coded for individual model architectures.
RTL Design Engineer
As an RTL Engineer, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both our existing and upcoming ASIC designs.
In this role, you will work closely with state-of-the-art architectures for machine learning. You do not need to have experience working with these yet, but you will be willing and able to learn quickly. You will work in a fast-paced environment with a high degree of autonomy, and be responsible for a key part of the team's success.
Representative projects:
- Implement a block to efficiently compute floating point math operators
- Provide feedback to the uArch team to make sure blocks meet timing and area constraints
You may be a good fit if you:
- At least 5 years of work experience in RTL development.
- Experience with high-speed digital logic.
- Proficiency in standard RTL design and synthesis tools
- Familiarity with verification work and writing test benches
- Are able to learn quickly about transformers and other aspects of modern artificial intelligence
- Willing to start quickly
Strong candidates may also have experience with:
- Experience with PCIe, Ethernet, or HBM technologies
- Familiarity with transformer models and machine learning.
- Familiarity with numerical representations and functions
- Ability to program with Python or another scripting language
About Ethan Alexander Group
Sourced by ZipRecruiter
Industry
Recruiting and staffing services
Company size
1 - 10 Employees
Headquarters location
Mission Hills, CA, US
Year founded
2013