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Junior Analog Layout Engineer Jobs (NOW HIRING)

Analog Layout Automation Engineer

Cupertino, CA · On-site

$249K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Analog Layout Automation Engineer

San Diego, CA · On-site

$214K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Analog Layout Automation Engineer

Cupertino, CA · On-site

$249K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Analog Layout Automation Engineer

Austin, TX · On-site

$200K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Decent understanding in analog layout requirements, such as matching and shielding; * Has extensive experience in the layout of low-power, high-resolution circuits, such as SD-ADC, SAR-ADC, bandgap ...

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

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Junior Analog Layout Engineer information

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$33.5K

$71.8K

$109.5K

How much do junior analog layout engineer jobs pay per year?

As of Jul 5, 2026, the average yearly pay for junior analog layout engineer in the United States is $71,799.00, according to ZipRecruiter salary data. Most workers in this role earn between $48,500.00 and $80,000.00 per year, depending on experience, location, and employer.

What is the difference between Junior Analog Layout Engineer vs Junior Digital Layout Engineer?

AspectJunior Analog Layout EngineerJunior Digital Layout Engineer
Required CredentialsBachelor's in Electrical Engineering or related; familiarity with analog IC design toolsBachelor's in Electrical Engineering or related; familiarity with digital IC design tools
Work EnvironmentDesigning analog circuits, working closely with analog IC teamsDesigning digital circuits, collaborating with digital IC teams
Industry UsageSemiconductor companies, analog IC design firmsSemiconductor companies, digital IC design firms
Common Search/ComparisonYesYes

The Junior Analog Layout Engineer and Junior Digital Layout Engineer roles share similar educational backgrounds and work environments within semiconductor companies. The key difference lies in the focus: analog layout involves designing circuits with continuous signals, while digital layout focuses on digital logic circuits. Both roles require familiarity with their respective design tools and industry standards, but their specific tasks and design considerations differ significantly.

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What cities are hiring for Junior Analog Layout Engineer jobs? Cities with the most Junior Analog Layout Engineer job openings:
What are the most commonly searched types of Analog Layout Engineer jobs? The most popular types of Analog Layout Engineer jobs are:
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Infographic showing various Junior Analog Layout Engineer job openings in the United States as of June 2026, with employment types broken down into 1% As Needed, 78% Full Time, 5% Part Time, 4% Temporary, 8% Contract, and 4% Nights. Highlights an 95% Physical, 2% Hybrid, and 3% Remote job distribution, with an average salary of $71,799 per year, or $34.5 per hour.
Senior High Speed Mixed-Signal I/O & Analog Layout Engineer

Senior High Speed Mixed-Signal I/O & Analog Layout Engineer

West Coast Consulting

San Jose, CA

$105 - $110/hr

Other

Posted 2 days ago


Job description

Job Description Onsite in San Jose, CA 5 days a week Description As a senior high speed mixed-signal layout/analog layout engineer, you will be working with circuit designers located in San Jose, California, USA to accomplish layout tasks. Circuits that you will need to work on includes High Speed RX (receiver), TX (transmitters), PLL, CDR, Analog reference circuits, and so on. You should have experiences doing layout with sub-micron CMOS technologies, Responsibilities: Working with remote circuit designers to determine the chip floorplan.

You need to come up with strategies to optimize the parasites, reduce area, and improve High Speed SERDES/analog performance. You need to be able to estimate schedule and come up with plan how to get things done within a dedicated time frame. You should be able to read the design document provided by the foundry and figure out how to resolve issues like latch-up and DRC.

Perform custom layout using Virtuoso, and be able to get LVS/DRC clean. You should be familiar with CAD tools, including Virtuoso, Calibre LVS, DRC, SkillCad and so on. Desired to have experience on chip level design, like bump, pad, and ESD strategies.

Good communication skills to discuss with circuit designer. Requirements: Bachelor s degree in electrical or computer engineering and 5+ years of professional experience as an IC layout designer; OR 8+ years of professional experience with integrated circuit layout design in lieu of a degree Preferred Skills: Strong High Speed SERDES/analog layout skills Experience in advanced nodes in IC layout, including finfet 14nm, 8nm, 4nm and 2nm GAA. Experience in IC layouts with frequencies up to 224Gb/s.

Experience in critical IC layouts, including VCO, clocking circuit, TX, and RX and so on. Working knowledge in Linux Proficiency in CAD tools including Cadence Virtuoso, Calibre LVS, DRC, and SkillCad. Excellency in communications skills in the form of verbal, email, and in documentations.

Be able to work independently. Good to have experience to lead a small team and tape-out an analog IC.