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Intern Emulation Engineer Jobs in California (NOW HIRING)

Etched

DV Intern

San Jose, CA · On-site

Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is ... You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate ...

Neuralink

Digital IC Design Engineer Intern

Fremont, CA · On-site

$35/hr

As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture ... FPGA emulation * Analog mixed-signal co-simulation * Design for testability * Collaboration on ...

Etched

DV Intern

San Jose, CA · On-site

Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is ... You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate ...

Neuralink

Digital IC Design Engineer Intern

Fremont, CA · On-site

$35/hr

As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture ... FPGA emulation * Analog mixed-signal co-simulation * Design for testability * Collaboration on ...

All JobsIntern Emulation Engineer JobsIntern Emulation Engineer Jobs in California

Intern Emulation Engineer information

What does an Intern Emulation Engineer do?

An Intern Emulation Engineer assists in the development and testing of hardware and software systems by using emulation platforms to simulate how chips or systems will behave in the real world. They work closely with senior engineers to set up, run, and debug emulation tests, analyze results, and help identify design issues. This role provides hands-on experience with advanced emulation tools and methodologies, which are critical in the semiconductor and electronics industries. Additionally, interns may help automate processes, document findings, and contribute to improving verification workflows.

What are the key skills and qualifications needed to thrive as an Intern Emulation Engineer, and why are they important?

To thrive as an Intern Emulation Engineer, a strong background in computer engineering, digital logic design, and familiarity with hardware description languages like Verilog or VHDL is essential, often supported by ongoing or completed studies in electrical engineering or computer science. Experience with FPGA development tools, emulation platforms (such as Mentor Graphics Veloce or Synopsys ZeBu), and scripting languages like Python or TCL is typically required. Attention to detail, problem-solving skills, and the ability to work collaboratively within engineering teams are vital soft skills. These capabilities are crucial for accurately simulating and verifying hardware designs, ensuring efficient development cycles and high-quality deliverables.

What types of projects and responsibilities can an Intern Emulation Engineer expect during their internship?

As an Intern Emulation Engineer, you will typically work on tasks such as setting up and running hardware emulation platforms, debugging simulation mismatches, and collaborating with design and verification teams to improve test coverage. You may be assigned to support the integration of new hardware designs into emulation environments or help automate testing processes. Interns are often encouraged to participate in team meetings and contribute ideas, gaining exposure to the full chip development lifecycle while learning industry-standard tools and methodologies.
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Intern Emulation Engineer jobs near you

DV Intern

Etched

San Jose, CA • On-site

Internship

Re-posted 6 days ago

Job description

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As aDesign Verification intern, you will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and NoCs - are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
  • Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
  • Familiarity with high-speed digital logic
  • Exposure to ASIC or SoC design concepts
  • Familiarity with SystemVerilog, UVM, or Python
  • Familiarity with verification work and writing test benches
  • Familiarity with physical design flows and tooling
  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Strong candidates may also have experience with
  • Familiarity with modern ML and LLM model architectures
  • UVM or formal verification experience
  • Ability to program with Python or another scripting language

We encourage you to apply even if you do not believe you meet every single qualification.
Program details
  • 12-week paid internship
  • Generous housing support for those relocating
  • Daily lunch and dinner in our office
  • Based at our office in San Jose, CA
  • Direct mentorship from industry leaders and world-class engineers
  • Opportunity to work on one of the most important problems of our time

For any questions, contact internships@etched.com
How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

Apply