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Asic Engineer Intern Jobs in California (NOW HIRING)

Etched

DFT Intern

San Jose, CA · On-site

$17.50 - $23.50/hr

Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is ... Exposure to ASIC or SoC design concepts * Familiarity with digital logic design fundamentals

Etched

DFT Intern

San Jose, CA · On-site

$17.50 - $23.50/hr

Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is ... Exposure to ASIC or SoC design concepts * Familiarity with digital logic design fundamentals

Etched

Infrastructure Intern

San Jose, CA · On-site

Job Summary Our infrastructure role drives the development and adoption of next-generation infrastructure tooling, enabling Etched ASIC, Software, and Platform engineers to iterate faster, build more ...

Etched

Infrastructure Intern

San Jose, CA · On-site

Job Summary Our infrastructurerole drives the development and adoption of next-generation infrastructure tooling, enabling Etched ASIC, Software, and Platform engineers to iterate faster, build more ...

Etched

SI/PI Intern

San Jose, CA · On-site

Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the ... You will work closely with package, PCB, ASIC, and system engineers to analyze high-speed ...

Etched

SI/PI Intern

San Jose, CA · On-site

Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the ... You will work closely with package, PCB, ASIC, and system engineers to analyze high-speed ...

Etched

PD Intern

San Jose, CA · On-site

Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

DV Intern

San Jose, CA · On-site

Job Summary As a Design Verification intern, you will ensure the custom IPs powering our chips ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

RTL Intern

San Jose, CA · On-site

Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

PD Intern

San Jose, CA · On-site

Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

RTL Intern

San Jose, CA · On-site

Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

DV Intern

San Jose, CA · On-site

Job Summary As aDesign Verification intern, you will ensure the custom IPs powering our chips ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

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All JobsAsic Engineer Intern JobsAsic Engineer Intern Jobs in California

Asic Engineer Intern information

What types of projects and tasks can I expect to work on as an ASIC Engineer Intern?

As an ASIC Engineer Intern, you can expect to be involved in a variety of tasks such as assisting with RTL design, verification, and simulation, as well as supporting the synthesis and timing analysis of integrated circuits. You may also work on debugging hardware issues, writing testbenches, and collaborating with senior engineers during design reviews. Interns often gain exposure to industry-standard tools and workflows, making it a valuable learning experience for those interested in a career in hardware design.

What is the difference between Asic Engineer Intern vs Digital Design Intern?

AspectAsic Engineer InternDigital Design Intern
Required CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often in Electrical or Computer Engineering
Work EnvironmentDesign teams focused on ASIC development, hardware labs, CAD toolsDigital circuit design, simulation, and verification environments
Employer & Industry UsageSemiconductor companies, chip design firms, tech corporationsElectronics manufacturers, semiconductor firms, research labs

Both roles are internship positions in the semiconductor industry, focusing on different aspects of chip design. An Asic Engineer Intern typically works on ASIC architecture and design, while a Digital Design Intern concentrates on digital circuit implementation and testing. Both internships provide valuable experience in hardware design and are often sought by students pursuing careers in integrated circuit development.

What are the key skills and qualifications needed to thrive as an ASIC Engineer Intern, and why are they important?

To thrive as an ASIC Engineer Intern, you need a solid understanding of digital logic design, Verilog or VHDL programming, and coursework in electrical or computer engineering. Familiarity with industry-standard tools such as Cadence, Synopsys, or ModelSim, as well as basic simulation and synthesis flows, is typically expected. Strong analytical thinking, attention to detail, and effective teamwork skills set candidates apart in this role. These competencies are vital for creating reliable, efficient integrated circuits and for collaborating successfully within engineering teams.

What does an ASIC Engineer Intern do?

An ASIC Engineer Intern assists in the design, development, and testing of Application-Specific Integrated Circuits (ASICs), which are specialized chips tailored for specific applications. Interns typically work under the supervision of experienced engineers, performing tasks such as schematic design, circuit simulation, verification, and debugging. They may also collaborate with software and hardware teams to ensure the ASIC functions correctly within larger systems. This role provides practical, hands-on experience and insight into the semiconductor industry.
What are popular job titles related to Asic Engineer Intern jobs in California? For Asic Engineer Intern jobs in California, the most frequently searched job titles are:
What job categories do people searching Asic Engineer Intern jobs in California look for? The top searched job categories for Asic Engineer Intern jobs in California are:
What cities in California are hiring for Asic Engineer Intern jobs? Cities in California with the most Asic Engineer Intern job openings:
Asic Engineer Intern jobs near you
Infographic showing various Asic Engineer Intern job openings in California as of July 2026, with employment types broken down into 4% As Needed, 90% Full Time, 3% Part Time, and 3% Contract. Highlights an 87% Physical, 8% Hybrid, and 5% Remote job distribution.

Design Engineering Intern

SK hynix memory solutions America Inc.

San Jose, CA

$35 - $45/hr

Other

Posted 16 days ago

Job description

About the Company:

At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.

We're looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change - we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.

Internship Duration: 6 months

Hours: 40 hours per week

Start Date: Immediately 

Team Description:

We are seeking a highly motivated and detail-oriented intern to join our team to contribute to ongoing ASIC project.

Responsibilities:

  • Perform design database management; proper check-in's of golden files, reverting unused changes, merge different files.
  • Should be able to code RTL logic with Verfilog syntax.
  • Should be able to run simulation using Synopsys VCS.
  • Should be able to debug simulation environment; compilation failure, simulation hang, simulation functional failure, etc.
  • Should be able to communicate with designers, verification engineers, and other team for the correct solution.

Minimum Qualifications:

  • BS/MS degree (completed or in progress) in Electrical Engineering, Electronics, Computer Science, or a related field.
  • Must have proficiency in Verilog, SystemVerilog programming language.
  • Must have good communication within co-working environments.
  • Must have good work ethic, i.e. punctual on deadline, trustworthy commitment on assignment.
  • Must be available to work 40 hours per week, Monday - Friday.
  • 100% onsite commitment for a 6-month duration. 

Preferred Qualifications:

  • Have a mindset on problem solving.
  • Understand ASIC/FPGA workflow from concept to real silicon
  • Scripting language skills such as Python, Perl, Tcl, etc.

COMPENSATION: $35/hr - $45/hr

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