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Asic Engineer Intern Jobs in California (NOW HIRING)

Etched

PD Intern

San Jose, CA · On-site

Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

RTL Intern

San Jose, CA · On-site

Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

PD Intern

San Jose, CA · On-site

Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

DV Intern

San Jose, CA · On-site

Job Summary As a Design Verification intern, you will ensure the custom IPs powering our chips ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

RTL Intern

San Jose, CA · On-site

Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic ... engineering, or a related field. * Familiarity with high-speed digital logic * Exposure to ASIC or ...

Etched

Mech / Thermal Intern

San Jose, CA · On-site

$22 - $29.50/hr

We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Summer '26, Fall '26, Spring '27, and ...

Etched

Electrical Platform Intern

San Jose, CA · On-site

$22.25 - $29.25/hr

We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Fall '26, Spring '27, and Summer '27 ...

Etched

Mech / Thermal Intern

San Jose, CA · On-site

$22 - $29.50/hr

We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Summer '26, Fall '26, Spring '27, and ...

Etched

Electrical Platform Intern

San Jose, CA · On-site

$22.25 - $29.25/hr

We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Fall '26, Spring '27, and Summer '27 ...

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Showing results 21-40

All JobsAsic Engineer Intern JobsAsic Engineer Intern Jobs in California

Asic Engineer Intern information

What does an ASIC Engineer Intern do?

An ASIC Engineer Intern assists in the design, development, and testing of Application-Specific Integrated Circuits (ASICs), which are specialized chips tailored for specific applications. Interns typically work under the supervision of experienced engineers, performing tasks such as schematic design, circuit simulation, verification, and debugging. They may also collaborate with software and hardware teams to ensure the ASIC functions correctly within larger systems. This role provides practical, hands-on experience and insight into the semiconductor industry.

What types of projects and tasks can I expect to work on as an ASIC Engineer Intern?

As an ASIC Engineer Intern, you can expect to be involved in a variety of tasks such as assisting with RTL design, verification, and simulation, as well as supporting the synthesis and timing analysis of integrated circuits. You may also work on debugging hardware issues, writing testbenches, and collaborating with senior engineers during design reviews. Interns often gain exposure to industry-standard tools and workflows, making it a valuable learning experience for those interested in a career in hardware design.

What are the key skills and qualifications needed to thrive as an ASIC Engineer Intern, and why are they important?

To thrive as an ASIC Engineer Intern, you need a solid understanding of digital logic design, Verilog or VHDL programming, and coursework in electrical or computer engineering. Familiarity with industry-standard tools such as Cadence, Synopsys, or ModelSim, as well as basic simulation and synthesis flows, is typically expected. Strong analytical thinking, attention to detail, and effective teamwork skills set candidates apart in this role. These competencies are vital for creating reliable, efficient integrated circuits and for collaborating successfully within engineering teams.

What is the difference between Asic Engineer Intern vs Digital Design Intern?

AspectAsic Engineer InternDigital Design Intern
Required CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often in Electrical or Computer Engineering
Work EnvironmentDesign teams focused on ASIC development, hardware labs, CAD toolsDigital circuit design, simulation, and verification environments
Employer & Industry UsageSemiconductor companies, chip design firms, tech corporationsElectronics manufacturers, semiconductor firms, research labs

Both roles are internship positions in the semiconductor industry, focusing on different aspects of chip design. An Asic Engineer Intern typically works on ASIC architecture and design, while a Digital Design Intern concentrates on digital circuit implementation and testing. Both internships provide valuable experience in hardware design and are often sought by students pursuing careers in integrated circuit development.

Are ASIC engineer interns in demand?

ASIC engineer internships are in demand due to the growing need for specialized hardware design in industries like consumer electronics, automotive, and telecommunications. Interns with skills in hardware description languages such as VHDL or Verilog and familiarity with EDA tools are particularly sought after, as companies seek to develop efficient and advanced integrated circuits.

How much does an ASIC engineer intern make?

An ASIC engineer intern typically earns between $20 and $40 per hour, depending on the company, location, and level of experience. Internships often last 3 to 6 months and may include additional benefits such as mentorship and skill development in hardware design and verification tools.

What is an ASIC engineer intern?

An ASIC engineer intern is a student or entry-level professional gaining hands-on experience in designing, developing, and testing application-specific integrated circuits (ASICs). The role typically involves working with hardware description languages like VHDL or Verilog and collaborating with engineering teams to support chip development projects. Internships often require basic knowledge of digital logic and familiarity with electronic design automation (EDA) tools.

What are popular job titles related to Asic Engineer Intern jobs in California?

For Asic Engineer Intern jobs in California, the most frequently searched job titles are:

What job categories do people searching Asic Engineer Intern jobs in California look for?

The top searched job categories for Asic Engineer Intern jobs in California are:

What cities in California are hiring for Asic Engineer Intern jobs?

Cities in California with the most Asic Engineer Intern job openings:

Asic Engineer Intern jobs near you
Infographic showing various Asic Engineer Intern job openings in California as of August 2026, with employment types broken down into 95% Full Time, 2% Part Time, and 3% Contract. Highlights an 85% Physical, 6% Hybrid, and 9% Remote job distribution.

PD Intern

Etched

San Jose, CA • On-site

Internship

Re-posted 16 days ago

Job description

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Physical Design intern for Etched, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
  • Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
  • Familiarity with high-speed digital logic
  • Exposure to ASIC or SoC design concepts
  • Familiarity with SystemVerilog, UVM, or Python
  • Familiarity with verification work and writing test benches
  • Familiarity with physical design flows and tooling
  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Strong candidates may also have experience with
  • Familiarity with modern ML and LLM model architectures
  • Familiarity with numerical representations and functions (RTL)
  • Familiarity with clocking and reset schemes (RTL/PD)
  • UVM or formal verification experience (DV)
  • Ability to program with Python or another scripting language

We encourage you to apply even if you do not believe you meet every single qualification.
Program details
  • 12-week paid internship
  • Generous housing support for those relocating
  • Daily lunch and dinner in our office
  • Based at our office in San Jose, CA
  • Direct mentorship from industry leaders and world-class engineers
  • Opportunity to work on one of the most important problems of our time

For any questions, contact internships@etched.com
How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

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