1

Ic Layout Mask Designer Jobs in Oregon (NOW HIRING)

Staff IC Design Engineer, Analog

Lake Oswego, OR · On-site

$207K/yr

Success is measured by delivering robust, reliable, production-quality integrated circuit designs ... Solid understanding of circuit building blocks and layout techniques for ultra-low-power design ...

OR · Hybrid

... of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules ... Experience with HDI designs is a plus * Proven experience in substrate layout of wire bond and flip ...

Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...

SerDes Circuit Design Engineer

Beaverton, OR · On-site

$210K/yr

You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...

You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...

OR

$145K - $160K/yr

... into a lead or senior IC role. * Portfolio showing end-to-end ownership of complex B2B or ... Deep proficiency in Figma, including component libraries, auto-layout, and prototyping. * Hands-on ...

Analog Engineer

Hillsboro, OR · On-site

$220K/yr

... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...

Analog Engineer

Hillsboro, OR · On-site

$220K/yr

... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...

... Layout/XPD, Designer, Hyperlynx). * Experience and knowledge with assembly process, test and ... IC digital design. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary ...

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team ... IC development from definition to high-volume production including layout supervision, bench ...

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team ... IC development from definition to high-volume production including layout supervision, bench ...

next page

Showing results 1-20

Ic Layout Mask Designer information

See Oregon salary details

$10

$43

$106

How much do ic layout mask designer jobs pay per hour?

As of Aug 1, 2026, the average hourly pay for ic layout mask designer in Oregon is $43.67, according to ZipRecruiter salary data. Most workers in this role earn between $18.56 and $61.78 per hour, depending on experience, location, and employer.

What are some common challenges faced by IC Layout Mask Designers in their daily work?

IC Layout Mask Designers often face challenges such as managing complex design constraints, optimizing layouts for manufacturability, and ensuring strict adherence to foundry design rules. Balancing performance, area, and power requirements while coordinating closely with circuit and verification engineers can add to the complexity. Staying updated with evolving semiconductor processes and continually learning new layout techniques are also important aspects of the role. Despite these challenges, many designers find the work rewarding due to the impact their contributions have on innovative electronics products.

What are the key skills and qualifications needed to thrive in the Ic Layout Mask Designer position, and why are they important?

To thrive as an IC Layout Mask Designer, you need a solid background in semiconductor physics, electronic circuit design, and proficiency with CAD tools such as Cadence Virtuoso or Mentor Graphics. Experience with industry-standard IC layout design and verification tools, as well as knowledge of relevant process design rules, is highly valued. Strong attention to detail, problem-solving capabilities, and the ability to collaborate across multidisciplinary teams are key soft skills for this role. These competencies are essential to ensure accuracy, manufacturability, and performance in complex integrated circuit designs.

What does an IC Layout Mask Designer do?

An IC Layout Mask Designer creates the physical design of integrated circuits (ICs) by translating circuit schematics into precise geometric patterns. These patterns are used to fabricate semiconductor chips via photolithography. The role involves ensuring circuit performance, optimizing layouts for electrical and manufacturability requirements, and working closely with design and fabrication teams. Proficiency in EDA tools, design rules, and CMOS technology is essential.

What are the most commonly searched types of Ic Layout Mask Designer jobs in Oregon? The most popular types of Ic Layout Mask Designer jobs in Oregon are:
What are popular job titles related to Ic Layout Mask Designer jobs in Oregon? For Ic Layout Mask Designer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Ic Layout Mask Designer jobs in Oregon look for? The top searched job categories for Ic Layout Mask Designer jobs in Oregon are:
What cities in Oregon are hiring for Ic Layout Mask Designer jobs? Cities in Oregon with the most Ic Layout Mask Designer job openings:
Infographic showing various Ic Layout Mask Designer job openings in Oregon as of July 2026, with employment types broken down into 90% Full Time, 6% Part Time, 1% Temporary, and 3% Contract. Highlights an 88% Physical, 6% Hybrid, and 6% Remote job distribution, with an average salary of $90,828 per year, or $43.7 per hour.

Principal IC Design Engineer, Analog

Gateway Recruiting

Happy Valley, OR

$212K/yr

Full-time

Re-posted 19 days ago


Job description

The Principal Analog IC Design Engineer will lead and personally contribute to the innovation, design, and development of ultra-low-power analog and mixed-signal integrated circuits used in life-critical implantable medical devices.

This role will provide technical leadership and hands-on contributions across all phases of product development, from early market and clinical definition through design, release, and long-term maintenance. This person will bring broad, cross-disciplinary expertise beyond IC design, working closely with research, manufacturing, quality, testing, and clinical teams to deliver highly reliable silicon that meets stringent medical and regulatory requirements.

The success of this role will be measured by the on-time delivery of product-specific integrated circuits that address key clinical and business needs while exceeding industry standards for performance, reliability, and quality. Using state-of-the-art CAD and simulation tools, this position will design, integrate, and verify complex circuits and systems, influencing architecture decisions and critical design tradeoffs.

The Principal Engineer will collaborate directly with system hardware, software, and clinical engineering teams, medical consultants, and IC design, test, and layout engineers across U.S. and international design centers, playing a pivotal role in bringing advanced implantable technologies from concept to production.

PRIMARY RESPONSIBILITIES:

  • Design and development of high-performance and high-reliability ultra-low power analog but also mixed signal integrated circuits for implantable medical products.
  • Active involvement in all aspects of IC design, including the development of functional concepts and specifications, top-level design architecture, design partitioning and block level design, detailed circuit design and simulation, layout floor-planning and transistor level layout, bench verification and testing, test-vector development, and documentation.
  • Design of novel, robust, ultra-low power, low-voltage analog/mixed-signal IC functional blocks including but not limited to voltage/current references, operational amplifiers, comparators, switched-capacitor circuits (amplifiers, filters, charge pumps, etc.), ADCs and DACs, oscillators, switching power circuits, communication circuits, etc.
  • Design of ultra-low power digital functional blocks (combinatorial, sequential, synchronous, asynchronous, state machines, etc.) for timing, control, interfacing and signal processing.
  • Create behavioral models for modules and system level verification models for circuits.
  • Perform pre-silicon verification and post-silicon validation of circuits.
  • Collaborate with IC Test group to define production vectors.
  • Consult with physicians, clinical research, published literature, and technology leaders on new and existing technologies, trends, and requirements for their uses.

QUALIFICATIONS AND EXPERIENCE:

  • Advanced degree in Electrical Engineering (MS / PhD) with additional background in business principles with demonstrated expertise in fundamental electrical engineering, circuit, and systems principles and closed form analytical approaches.
  • The candidate should be a self-motivated independent thinker able to apply industry research and personal experience to design proposals combined with strong verbal communications skills and strong technical document writing skills.
  • 8+ years of experience in analog/mixed-signal IC design for very low power portable and/or implantable applications, with a strong grasp of the tradeoffs involved in using various analog and digital circuit design techniques (RTL or schematic based) to optimally implement system functions.
    • Preferred: 5+ years implantable medical device industry experience including FDA regulated design controls and product approval process.
  • Deep understanding of CMOS processes, device characteristics and models, transistor level circuit analysis and design concepts and trade-offs: BW, noise, power, feedback analysis, stability etc., worst case process corners, margin and Monte Carlo analysis, and design-for-test.
    • Knowledge of low power flows, including voltage/power domains, power shutoff, retention is desired
  • Solid understanding of circuit building blocks (op-amps, comparators, voltage and current references, DACs, ADCs,) and layout techniques for ultra-low power design to deliver robust, production quality silicon designs.
    • Preferred: Experience with medical domain specific designs such as neuromodulation, charging, low noise biomedical signal measurement and processing, battery energy conversion techniques, and very low power RF communication circuits.
  • Extensive working knowledge and use of Cadence mixed signal Design tools, Virtuoso XL, Spectre, Xcelium/AMS simulators along with Maestro, and other mixed signal signoff tools for analog regression testing.
    • Preferred: Knowledge of scripting/language (perl, shell, tcl, python) along with C/C++, as well Matlab is desirable
  • Experience in lab bench characterization and test-vector generation for pre-silicon and post-silicon verification, design-for-manufacturing test vector generation, production support, fault isolation and failure analysis, and pre-clinical and clinical testing environments.
  • The candidate would demonstrate industry recognition of technical accomplishments in the form of patents and/or published articles.
    • Preferred: Experience with international teams and a working knowledge of German would be highly desirable.