Hillsboro, OR · On-site
$148K/yr
Cadence Allegro/Advanced Package Designer (APD / SiP) Experience :- Strong hands-on experience in ... Physical Design & Layout Substrate design and layout SI/PI aware design implementation Design for ...
Hillsboro, OR · On-site
$148K/yr
Cadence Allegro/Advanced Package Designer (APD / SiP) Experience :- Strong hands-on experience in ... Physical Design & Layout Substrate design and layout SI/PI aware design implementation Design for ...
Lake Oswego, OR · On-site
$207K/yr
Success is measured by delivering robust, reliable, production-quality integrated circuit designs ... Solid understanding of circuit building blocks and layout techniques for ultra-low-power design ...
Lake Oswego, OR · On-site
$207K/yr
Success is measured by delivering robust, reliable, production-quality integrated circuit designs ... Solid understanding of circuit building blocks and layout techniques for ultra-low-power design ...
Vancouver, WA · On-site
$150 - $200/hr
About the Role We are seeking a motivated and detail-oriented Senior or Staff level Analog IC ... Proven ability to carry designs from specification through schematic, simulation, layout guidance ...
Vancouver, WA · On-site
$150 - $200/hr
About the Role We are seeking a motivated and detail-oriented Senior or Staff level Analog IC ... Proven ability to carry designs from specification through schematic, simulation, layout guidance ...
Vancouver, WA · On-site
$150K - $200K/yr
About the Role We are seeking a motivated and detail-oriented Senior or Staff level Analog IC ... Proven ability to carry designs from specification through schematic, simulation, layout guidance ...
Vancouver, WA · On-site
$150K - $200K/yr
About the Role We are seeking a motivated and detail-oriented Senior or Staff level Analog IC ... Proven ability to carry designs from specification through schematic, simulation, layout guidance ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Hillsboro, OR · On-site
$122.44 - $232.19/hr
Memory bit-cell and complex periphery IC layout and automation.* Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Hillsboro, OR · On-site
$122.44 - $232.19/hr
Memory bit-cell and complex periphery IC layout and automation.* Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Beaverton, OR · On-site
$210K/yr
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... IC development from definition to high-volume production including layout supervision, bench ...
Beaverton, OR · On-site
$210K/yr
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... IC development from definition to high-volume production including layout supervision, bench ...
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... IC development from definition to high-volume production including layout supervision, bench ...
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... IC development from definition to high-volume production including layout supervision, bench ...
You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...
You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...
Beaverton, OR · On-site
$210K/yr
You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...
Beaverton, OR · On-site
$210K/yr
You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...
Beaverton, OR · On-site
$140 - $210/hr
You will drive mask design to implement layout view of designs. You will closely work with SOC ... Hands‑on experience with AMS IC development from definition to high-volume production including ...
Beaverton, OR · On-site
$140 - $210/hr
You will drive mask design to implement layout view of designs. You will closely work with SOC ... Hands‑on experience with AMS IC development from definition to high-volume production including ...
Hillsboro, OR · On-site +1
$144K - $187K/yr
Work with Marketing, internal and external module designers to define the switch/LNA/RF IC. * Extensive experience designing with HFSS, Cadence and ADS * The conceptualization, design, layout ...
Hillsboro, OR · On-site +1
$144K - $187K/yr
Work with Marketing, internal and external module designers to define the switch/LNA/RF IC. * Extensive experience designing with HFSS, Cadence and ADS * The conceptualization, design, layout ...
Hillsboro, OR · On-site
$122K - $172K/yr
Experience integrating performance, power, and area optimization into circuit designs. Experience in analog IC design. Mixed-signal design. Knowledge of layout considerations for analog circuits.
Hillsboro, OR · On-site
$122K - $172K/yr
Experience integrating performance, power, and area optimization into circuit designs. Experience in analog IC design. Mixed-signal design. Knowledge of layout considerations for analog circuits.
Vancouver, WA · On-site
$174K/yr
... designed with the channel * Responsible for pre-layout and post layout channel simulation and ... Previous experience of IC packaging, manufacturing, and advanced package design * Knowledge of ...
Quick apply
Vancouver, WA · On-site
$174K/yr
... designed with the channel * Responsible for pre-layout and post layout channel simulation and ... Previous experience of IC packaging, manufacturing, and advanced package design * Knowledge of ...
Wilsonville, OR · On-site
$110 - $198/hr
... team in the Siemens EDA IC segment. You will be part of a team responsible for designing ... layout analysis and simulation. Development responsibilities will span different software ...
New
Wilsonville, OR · On-site
$110 - $198/hr
... team in the Siemens EDA IC segment. You will be part of a team responsible for designing ... layout analysis and simulation. Development responsibilities will span different software ...
New
Hillsboro, OR · On-site
$164.47 - $269.10/hr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Hillsboro, OR · On-site
$164.47 - $269.10/hr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Hillsboro, OR · On-site
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Hillsboro, OR · On-site
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team ... IC development from definition to high-volume production including layout supervision, bench ...
We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team ... IC development from definition to high-volume production including layout supervision, bench ...
$17.81 is the 25th percentile. Wages below this are outliers.
$10.71 - $19.47
31% of jobs
$19.47 - $28.23
16% of jobs
The median wage is $30.86 / hr.
$28.23 - $36.99
11% of jobs
$36.99 - $45.75
15% of jobs
$51.22 is the 75th percentile. Wages above this are outliers.
$45.75 - $54.51
4% of jobs
$54.51 - $63.27
6% of jobs
$63.27 - $72.03
5% of jobs
$72.03 - $80.79
3% of jobs
$80.79 - $89.55
2% of jobs
$89.55 - $98.31
3% of jobs
$98.31 - $107.07
3% of jobs
$10
$43
$107
An IC Layout Mask Designer creates the physical design of integrated circuits (ICs) by translating circuit schematics into precise geometric patterns. These patterns are used to fabricate semiconductor chips via photolithography. The role involves ensuring circuit performance, optimizing layouts for electrical and manufacturability requirements, and working closely with design and fabrication teams. Proficiency in EDA tools, design rules, and CMOS technology is essential.
To thrive as an IC Layout Mask Designer, you need a solid background in semiconductor physics, electronic circuit design, and proficiency with CAD tools such as Cadence Virtuoso or Mentor Graphics. Experience with industry-standard IC layout design and verification tools, as well as knowledge of relevant process design rules, is highly valued. Strong attention to detail, problem-solving capabilities, and the ability to collaborate across multidisciplinary teams are key soft skills for this role. These competencies are essential to ensure accuracy, manufacturability, and performance in complex integrated circuit designs.
IC Layout Mask Designers often face challenges such as managing complex design constraints, optimizing layouts for manufacturability, and ensuring strict adherence to foundry design rules. Balancing performance, area, and power requirements while coordinating closely with circuit and verification engineers can add to the complexity. Staying updated with evolving semiconductor processes and continually learning new layout techniques are also important aspects of the role. Despite these challenges, many designers find the work rewarding due to the impact their contributions have on innovative electronics products.
The most popular types of Ic Layout Mask Designer jobs in Portland, OR are:
For Ic Layout Mask Designer jobs in Portland, OR, the most frequently searched job titles are:
The top searched job categories for Ic Layout Mask Designer jobs in Portland, OR are:
Cities near Portland, OR with the most Ic Layout Mask Designer job openings:
$148K/yr
Other
Posted 4 days ago
Role : IC Packaging Design Engineer
LOC: Chandler, AZ or Hillsboro, OR (ONSITE)
Experience : !0+ years
Skills Required : -
Bachelor s or Master s degree in Electrical /Electronics Engineering
Experience Tier: Senior-level (primary); Mid-level (secondary)
Senior-Level: ~10+ years in IC packaging / package design
Mid-Level: 4-6+ years (MS) or 6+ years (BS) in IC packaging / package design
Strong hands-on experience in Siemens (Mentor) Xpedition (XPD); Alternatively: Cadence Allegro/Advanced Package Designer (APD / SiP)
Experience :-
Strong hands-on experience in Siemens (Mentor) Xpedition (XPD); Alternatively: Cadence Allegro/Advanced Package Designer (APD / SiP)
Candidates should have experience in the below domains:
Physical Design & Layout
Substrate design and layout
SI/PI aware design implementation
Design for performance, manufacturability, yield, and reliability
Design rule compliance
Sourced by ZipRecruiter
It services
51 - 200 Employees
Old Bridge, NJ, US
