Hillsboro, OR · On-site
$148K/yr
Cadence Allegro/Advanced Package Designer (APD / SiP) Experience :- Strong hands-on experience in ... Physical Design & Layout Substrate design and layout SI/PI aware design implementation Design for ...
New
Hillsboro, OR · On-site
$148K/yr
Cadence Allegro/Advanced Package Designer (APD / SiP) Experience :- Strong hands-on experience in ... Physical Design & Layout Substrate design and layout SI/PI aware design implementation Design for ...
New
Lake Oswego, OR · On-site
$207K/yr
Success is measured by delivering robust, reliable, production-quality integrated circuit designs ... Solid understanding of circuit building blocks and layout techniques for ultra-low-power design ...
Lake Oswego, OR · On-site
$207K/yr
Success is measured by delivering robust, reliable, production-quality integrated circuit designs ... Solid understanding of circuit building blocks and layout techniques for ultra-low-power design ...
Vancouver, WA · On-site
$150 - $200/hr
About the Role We are seeking a motivated and detail-oriented Senior or Staff level Analog IC ... Proven ability to carry designs from specification through schematic, simulation, layout guidance ...
Vancouver, WA · On-site
$150 - $200/hr
About the Role We are seeking a motivated and detail-oriented Senior or Staff level Analog IC ... Proven ability to carry designs from specification through schematic, simulation, layout guidance ...
Vancouver, WA · On-site
$150K - $200K/yr
About the Role We are seeking a motivated and detail-oriented Senior or Staff level Analog IC ... Proven ability to carry designs from specification through schematic, simulation, layout guidance ...
Vancouver, WA · On-site
$150K - $200K/yr
About the Role We are seeking a motivated and detail-oriented Senior or Staff level Analog IC ... Proven ability to carry designs from specification through schematic, simulation, layout guidance ...
Hillsboro, OR · On-site
$122.44 - $232.19/hr
Memory bit-cell and complex periphery IC layout and automation.* Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Hillsboro, OR · On-site
$122.44 - $232.19/hr
Memory bit-cell and complex periphery IC layout and automation.* Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... designs, develops, manufactures, and assembly/test packages the compute devices to improve the ...
Hillsboro, OR · On-site +1
$144K - $187K/yr
Work with Marketing, internal and external module designers to define the switch/LNA/RF IC. * Extensive experience designing with HFSS, Cadence and ADS * The conceptualization, design, layout ...
New
Hillsboro, OR · On-site +1
$144K - $187K/yr
Work with Marketing, internal and external module designers to define the switch/LNA/RF IC. * Extensive experience designing with HFSS, Cadence and ADS * The conceptualization, design, layout ...
New
Hillsboro, OR · On-site
$122K - $172K/yr
Experience integrating performance, power, and area optimization into circuit designs. Experience in analog IC design. Mixed-signal design. Knowledge of layout considerations for analog circuits.
Hillsboro, OR · On-site
$122K - $172K/yr
Experience integrating performance, power, and area optimization into circuit designs. Experience in analog IC design. Mixed-signal design. Knowledge of layout considerations for analog circuits.
... designed with the channel * Responsible for pre-layout and post layout channel simulation and ... Previous experience of IC packaging, manufacturing, and advanced package design * Knowledge of ...
Quick apply
... designed with the channel * Responsible for pre-layout and post layout channel simulation and ... Previous experience of IC packaging, manufacturing, and advanced package design * Knowledge of ...
Beaverton, OR · On-site
$210K/yr
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... IC development from definition to high-volume production including layout supervision, bench ...
Beaverton, OR · On-site
$210K/yr
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... IC development from definition to high-volume production including layout supervision, bench ...
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... IC development from definition to high-volume production including layout supervision, bench ...
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... IC development from definition to high-volume production including layout supervision, bench ...
Beaverton, OR · On-site
$150 - $200/hr
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... Hands‑on experience with AMS IC development from definition to high-volume production including ...
Beaverton, OR · On-site
$150 - $200/hr
You will also drive mask design to implement layout view of designs. You will coordinate with IP ... Hands‑on experience with AMS IC development from definition to high-volume production including ...
You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...
You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...
Beaverton, OR · On-site
$210K/yr
You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...
Beaverton, OR · On-site
$210K/yr
You will drive mask design to implement layout view of designs. You will closely work with SOC ... IC development from definition to high-volume production including layout supervision, bench ...
Hillsboro, OR · On-site
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Hillsboro, OR · On-site
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Hillsboro, OR · On-site
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Hillsboro, OR · On-site
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Hillsboro, OR · On-site
$164.47 - $269.10/hr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Hillsboro, OR · On-site
$164.47 - $269.10/hr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Beaverton, OR · On-site
$140 - $210/hr
You will drive mask design to implement layout view of designs. You will closely work with SOC ... Hands‑on experience with AMS IC development from definition to high-volume production including ...
Beaverton, OR · On-site
$140 - $210/hr
You will drive mask design to implement layout view of designs. You will closely work with SOC ... Hands‑on experience with AMS IC development from definition to high-volume production including ...
We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team ... IC development from definition to high-volume production including layout supervision, bench ...
We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team ... IC development from definition to high-volume production including layout supervision, bench ...
$17.81 is the 25th percentile. Wages below this are outliers.
$10.71 - $19.47
31% of jobs
$19.47 - $28.23
16% of jobs
The median wage is $30.86 / hr.
$28.23 - $36.99
11% of jobs
$36.99 - $45.75
15% of jobs
$51.22 is the 75th percentile. Wages above this are outliers.
$45.75 - $54.51
4% of jobs
$54.51 - $63.27
6% of jobs
$63.27 - $72.03
5% of jobs
$72.03 - $80.79
3% of jobs
$80.79 - $89.55
2% of jobs
$89.55 - $98.31
3% of jobs
$98.31 - $107.07
3% of jobs
$10
$43
$107
An IC Layout Designer is responsible for creating the physical design of integrated circuits (ICs) based on schematics provided by circuit designers. They use specialized software tools to arrange transistors, resistors, capacitors, and interconnections while ensuring proper functionality, manufacturability, and performance. Their role involves optimizing layouts for power, area, and signal integrity while adhering to design rules and foundry guidelines. IC Layout Designers work closely with circuit designers and verification engineers to meet project specifications and ensure successful chip fabrication.
As an IC Layout Designer, your typical day involves interpreting circuit schematics, translating them into physical layouts using specialized EDA tools, and running verification checks to ensure compliance with design and manufacturing rules. You will collaborate closely with circuit designers and verification engineers to address layout-related challenges and optimize designs for performance, area, and yield. Regular communication and feedback sessions are common, as is updating documentation and maintaining clear records of design changes. These tasks help ensure project timelines are met and high-quality integrated circuits are delivered.
To thrive as an IC Layout Designer, you need a strong background in semiconductor physics, circuit design principles, and experience with industry-standard layout tools such as Cadence Virtuoso or Synopsys Custom Compiler, often supported by a degree in Electrical Engineering or a related field. Familiarity with DRC/LVS verification, PDKs, and EDA tools, as well as knowledge of relevant process nodes, is essential. Attention to detail, effective teamwork, and strong communication skills enable designers to collaborate with circuit engineers and deliver precise layouts under tight deadlines. These competencies ensure the creation of optimized, reliable integrated circuits while meeting stringent performance and manufacturability requirements.
For Ic Layout Designer jobs in Portland, OR, the most frequently searched job titles are:
The top searched job categories for Ic Layout Designer jobs in Portland, OR are:
$148K/yr
Other
Posted 2 days ago
New
Role : IC Packaging Design Engineer
LOC: Chandler, AZ or Hillsboro, OR (ONSITE)
Experience : !0+ years
Skills Required : -
Bachelor s or Master s degree in Electrical /Electronics Engineering
Experience Tier: Senior-level (primary); Mid-level (secondary)
Senior-Level: ~10+ years in IC packaging / package design
Mid-Level: 4-6+ years (MS) or 6+ years (BS) in IC packaging / package design
Strong hands-on experience in Siemens (Mentor) Xpedition (XPD); Alternatively: Cadence Allegro/Advanced Package Designer (APD / SiP)
Experience :-
Strong hands-on experience in Siemens (Mentor) Xpedition (XPD); Alternatively: Cadence Allegro/Advanced Package Designer (APD / SiP)
Candidates should have experience in the below domains:
Physical Design & Layout
Substrate design and layout
SI/PI aware design implementation
Design for performance, manufacturability, yield, and reliability
Design rule compliance
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It services
51 - 200 Employees
Old Bridge, NJ, US
