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Ic Layout Design Jobs in California (NOW HIRING)

Saige Partners

ANalog Layout Engineer

San Jose, CA · On-site

$236K/yr

Senior High-Speed Mixed-Signal / Analog IC Layout Engineer (San Jose, CA)As an Analog Layout ... Design verification including DRC, LVS, ERC and ANT and extraction. Block level floor planning with ...

Glow Networks

Analog Layout Engineer

Santa Clara, CA · On-site

$237K/yr

Responsibilities include leading IC layout of cutting-edge high-performance, high-speed CMOS ... Experience with FinFET process nodes preferred Experience working with distributed design teams a ...

Teledyne

Sr. ASIC Layout Design Engineer

Goleta, CA · On-site

$113K - $151K/yr

Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs ... Ensure layout integrity and compliance to foundry wafer fabrication with Design Rule Checks (DRC ...

NuByt, Inc

Be Seen First

Analog Layout Engineer

San Jose, CA · On-site

$90 - $95/hr

The ideal candidate will have strong hands-on experience with analog IC layout, advanced process ... Perform design verification, including DRC, LVS, ERC, ANT , and parasitic extraction. * Collaborate ...

New

Saige Partners

Analog Layout Engineer

San Jose, CA · On-site

$100 - $110/hr

Senior High-Speed Mixed-Signal / Analog IC Layout Engineer (San Jose, CA) As an Analog Layout ... Design verification including DRC, LVS, ERC and ANT and extraction. Block level floor planning with ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

$156K - $160K/yr

Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors ...

Neurophos Inc

Staff Analog Layout Engineer

Sunnyvale, CA · On-site

$160K - $200K/yr

... Design Rules (RDRs) and electromigration. Location San Jose, CA or Hsinchu, Taiwan. Full-time onsite position. Key Responsibilities * Perform custom IC layout execution of high-speed analog/RF ...

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All JobsIc Layout Design JobsIc Layout Design Jobs in California

Ic Layout Design information

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How much do ic layout design jobs pay per hour?

As of Aug 8, 2026, the average hourly pay for ic layout design in California is $40.76, according to ZipRecruiter salary data. Most workers in this role earn between $17.31 and $57.64 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an IC layout designer, and why are they important?

To thrive as an IC Layout Designer, you need a solid background in electronics or electrical engineering, with expertise in semiconductor device physics and circuit design principles. Familiarity with EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of industry standards like DRC/LVS are typically required. Attention to detail, problem-solving skills, and effective communication are crucial soft skills for collaborating with design and verification teams. These abilities are essential to ensure high-quality, manufacturable layouts that meet performance and reliability requirements in the competitive semiconductor industry.

What is IC layout design?

IC Layout Design refers to the process of creating the physical layout of integrated circuits (ICs) on a semiconductor chip. It involves translating circuit schematics into geometric patterns that define the placement of transistors, interconnections, and other components on silicon. IC layout designers use specialized software tools to ensure that the design meets electrical, timing, and manufacturing requirements. This step is critical in the semiconductor manufacturing process, as it directly impacts the performance, size, and yield of the final IC.

What is the difference between Ic Layout Design vs IC Design Engineer?

AspectIC Layout DesignIC Design Engineer
Primary FocusCreating physical layouts of integrated circuitsDesigning circuit schematics and functional architecture
Skills RequiredCAD tools, layout optimization, fabrication process knowledgeCircuit theory, HDL coding, simulation
Work EnvironmentEDA tools, cleanroom facilities, collaboration with fabrication teamsDesign teams, simulation labs, software environments
CertificationsTypically none required, but certifications in CAD tools are beneficialEE degree, possibly certifications in digital design or verification

IC Layout Design focuses on physically implementing circuit designs on silicon, while IC Design Engineer involves creating the circuit architecture and logic. Both roles are essential in chip development, often working closely but with distinct skill sets and responsibilities.

What are some common challenges IC layout design engineers face when collaborating with circuit designers?

IC Layout Design engineers often work closely with circuit designers to translate schematic designs into physical layouts, which can present challenges such as resolving design-rule violations, managing tight space constraints, and ensuring signal integrity. Effective communication is essential to address trade-offs between performance, area, and manufacturability. Timely feedback loops and a collaborative approach help ensure that both the layout and schematic meet project specifications and timelines.
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Ic Layout Design jobs near you
Infographic showing various Ic Layout Design job openings in California as of August 2026, with employment types broken down into 92% Full Time, and 8% Contract. Highlights an 100% In-person job distribution, with an average salary of $84,781 per year, or $40.8 per hour.

Sr. RFIC Layout Designer (RFIC Engineering)

SpaceX

Palo Alto, CA • On-site

$150K - $245K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 17 days ago

SpaceX rating

8.8

Company rating: 8.8 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

15th of 72 rated aerospace companies

Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. RFIC LAYOUT DESIGNER (RFIC ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking motivated, proactive, and intellectually curious engineers who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design, firmware, pre-silicon verification, post-silicon validation, product engineering, manufacturing/production, and more). In this role, you will be on a team working on multiple silicon projects that are driving more integration, lower power, mixed signal architectures and advanced silicon technology for deployment in space and ground infrastructures. You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and RFIC designs.
RESPONSIBILITIES:
  • Work with the integrated circuit designers and chip leads to determine the chip floor plan; this includes strategies for power and ground distribution as well as working with packaging engineer to determine pad locations
  • Accurately estimate the schedule for the layout work and identify areas of complexity that need early investigation
  • Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing parasitic capacitance in the layout
  • Perform design rule checking, electrical rule checking and layout versus schematic checks and resolve errors
  • Perform top-level layout integration with electrostatic discharge structures and pad assembly and perform final tape out (including density fill, running design for manufacturability checks and sharing GDS with the foundry)
  • Work with EDA suppliers to trial new tools and features
  • Generate guides and demos for others in the team to showcase improvements in layout technique

BASIC QUALIFICATIONS:
  • Bachelor's degree in electrical or computer engineering and 5+ years of professional experience as an IC layout designer; OR 8+ years of professional experience with integrated circuit layout design in lieu of a degree

PREFERRED SKILLS AND EXPERIENCE:
  • Strong analog layout skills
  • Experience in advanced node IC layouts such as 22nm, 16nm, 7nm, 5nm or below
  • Experience in layout of circuits with frequencies up to 50GHz
  • Experience in layout of sensitive RF blocks such as low noise amplifiers, voltage controlled oscillators and mixers
  • Experience with skill programming
  • Experience with shell scripting, Perl, Python or similar language
  • Experience managing revision control systems
  • Experience with circuit design
  • Understanding of layout considerations for device matching, coupling and noise isolation
  • Working knowledge of Linux
  • Excellent communication skills (both oral and written) are required
  • Able to work independently on challenging problems

ADDITIONAL REQUIREMENTS:
  • Must be willing to work extended hours and weekends as needed to meet critical milestones
COMPENSATION AND BENEFITS:
Pay Range:
Level 3: $150,000.00 - $245,000.00
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees accrue paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law.
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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About SpaceX

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Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US

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