ZipRecruiter

Log In

1

Ic Layout Design Jobs in California (NOW HIRING)

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors ...

Cisco

IC Package Layout Team Leader

San Jose, CA · On-site

$210K - $305K/yr

Because full product development-from design to qualification to production-is within our team, w ... Your Impact As a Package Layout Team Leader, you will lead and grow the San Jose layout team while ...

previous page

Showing results 41-60

All JobsIc Layout Design JobsIc Layout Design Jobs in California

Ic Layout Design information

See California salary details

$9

$40

$99

How much do ic layout design jobs pay per hour?

As of Sep 1, 2026, the average hourly pay for ic layout design in California is $40.76, according to ZipRecruiter salary data. Most workers in this role earn between $17.31 and $57.64 per hour, depending on experience, location, and employer.

What is IC layout design?

IC Layout Design refers to the process of creating the physical layout of integrated circuits (ICs) on a semiconductor chip. It involves translating circuit schematics into geometric patterns that define the placement of transistors, interconnections, and other components on silicon. IC layout designers use specialized software tools to ensure that the design meets electrical, timing, and manufacturing requirements. This step is critical in the semiconductor manufacturing process, as it directly impacts the performance, size, and yield of the final IC.

What are the key skills and qualifications needed to thrive as an IC layout designer, and why are they important?

To thrive as an IC Layout Designer, you need a solid background in electronics or electrical engineering, with expertise in semiconductor device physics and circuit design principles. Familiarity with EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of industry standards like DRC/LVS are typically required. Attention to detail, problem-solving skills, and effective communication are crucial soft skills for collaborating with design and verification teams. These abilities are essential to ensure high-quality, manufacturable layouts that meet performance and reliability requirements in the competitive semiconductor industry.

What are some common challenges IC layout design engineers face when collaborating with circuit designers?

IC Layout Design engineers often work closely with circuit designers to translate schematic designs into physical layouts, which can present challenges such as resolving design-rule violations, managing tight space constraints, and ensuring signal integrity. Effective communication is essential to address trade-offs between performance, area, and manufacturability. Timely feedback loops and a collaborative approach help ensure that both the layout and schematic meet project specifications and timelines.

What is the difference between Ic Layout Design vs IC Design Engineer?

AspectIC Layout DesignIC Design Engineer
Primary FocusCreating physical layouts of integrated circuitsDesigning circuit schematics and functional architecture
Skills RequiredCAD tools, layout optimization, fabrication process knowledgeCircuit theory, HDL coding, simulation
Work EnvironmentEDA tools, cleanroom facilities, collaboration with fabrication teamsDesign teams, simulation labs, software environments
CertificationsTypically none required, but certifications in CAD tools are beneficialEE degree, possibly certifications in digital design or verification

IC Layout Design focuses on physically implementing circuit designs on silicon, while IC Design Engineer involves creating the circuit architecture and logic. Both roles are essential in chip development, often working closely but with distinct skill sets and responsibilities.

What are popular job titles related to Ic Layout Design jobs in California?

For Ic Layout Design jobs in California, the most frequently searched job titles are:

What job categories do people searching Ic Layout Design jobs in California look for?

The top searched job categories for Ic Layout Design jobs in California are:

What cities in California are hiring for Ic Layout Design jobs?

Cities in California with the most Ic Layout Design job openings:

Ic Layout Design jobs near you
Infographic showing various Ic Layout Design job openings in California as of August 2026, with employment types broken down into 83% Full Time, 12% Part Time, and 5% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $84,781 per year, or $40.8 per hour.

Analog Design Engineer

OMNIVISION

Santa Clara, CA • On-site

$156K - $160K/yr

Full-time

Re-posted 11 days ago

Job description

Job Title: Analog Design Engineer 
 
Job Duties:
 
Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso. Work on whole chip floorplan design and pad frame. Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso. Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice. Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with Digital Engineer to define and design the analog to digital interface. Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors. Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology. Process the column readout data from the CMOS sensor using data processing software like Excel and MATLAB. Perform a performance check and conduct debug analysis based on the data results. Design the internal Discrete-time Circuits, Peripheral circuits and Timing control for a CMOS image sensor, including bias circuits, driver/level shifter, switched capacitor, logic gates and slew rate control. 
 
Requirements:
 
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineer, Electro-Optics, or a related field with graduate level course work of Analog IC Design, Data Converters, and VLSI Circuits and Technology.
 
Must possess the skills of:
 
  • Layout design and floor planning.
  • Testing and troubleshooting power IC.
  • Using lab equipment testing specific IC.
  • Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors, Optical filters.
  • Matlab and Excel to do signal processing, imaging processing and data analysis.
  • Feedback, opamp, switched-capacitor circuits, layout and mismatch, and noise.
  • Data converter systems and circuits, including ADC and DAC architecture such as flash, two-step, pipelined, algorithmic, successive-approximation, R-2R DACs.
  • Analysis and design of modern digital circuits. Design and analyze CMOS digital circuit. Use commercial software Cadence. 
 
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.

Apply