Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi.
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon
Cellular ASIC Design Engineer
Austin, TX · On-site
Description As a Cellular ASIC Design Engineer, you'll develop and optimize design and implementation methodology for integrated circuits across multiple focus areas including area efficiency, power ...
Cellular ASIC Design Engineer
Austin, TX · On-site
Description As a Cellular ASIC Design Engineer, you'll develop and optimize design and implementation methodology for integrated circuits across multiple focus areas including area efficiency, power ...
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team collaborates with the front design team ...
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team collaborates with the front design team ...
ASIC Design Verification Engineer
Austin, TX · On-site
$175K/yr
THE ROLE The AMD UMC Team (part of the MSIP organization) is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR/LPDDR technologies powering data ...
ASIC Design Verification Engineer
Austin, TX · On-site
$175K/yr
THE ROLE The AMD UMC Team (part of the MSIP organization) is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR/LPDDR technologies powering data ...
ASIC Engineer, Design Verification
Austin, TX · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...
ASIC Engineer, Design Verification
Austin, TX · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At ...
Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At ...
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
ASIC Design Verification Engineer
Austin, TX · On-site
$156K/yr
The MSIP UMC team is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR technologies powering data center and machine learning workloads. This team ...
ASIC Design Verification Engineer
Austin, TX · On-site
$156K/yr
The MSIP UMC team is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR technologies powering data center and machine learning workloads. This team ...
THE ROLE The AMD UMC Team (part of the MSIP organization) is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR/LPDDR technologies powering data ...
THE ROLE The AMD UMC Team (part of the MSIP organization) is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR/LPDDR technologies powering data ...
The MSIP UMC team is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR technologies powering data center and machine learning workloads. This team ...
The MSIP UMC team is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR technologies powering data center and machine learning workloads. This team ...
We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and processors on our next-generation mobile, embedded ...
We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and processors on our next-generation mobile, embedded ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an ... Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in ...
Physical Design Engineer- Senior
Austin, TX · On-site
$115.60 - $173.40/hr
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. * Master's degree in Science, Engineering ...
Physical Design Engineer- Senior
Austin, TX · On-site
$115.60 - $173.40/hr
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. * Master's degree in Science, Engineering ...
ASIC Engineer, Design Verification
Austin, TX · On-site +1
$146K/yr
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for ...
ASIC Engineer, Design Verification
Austin, TX · On-site +1
$146K/yr
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for ...
ASIC Engineer, Design
$146K/yr
ASIC Engineer, Design Responsibilities: * Develop micro-architecture, RTL coding, and design verification for complex IPs. * Work with architects to map algorithms onto the hardware and specify ...
ASIC Engineer, Design
$146K/yr
ASIC Engineer, Design Responsibilities: * Develop micro-architecture, RTL coding, and design verification for complex IPs. * Work with architects to map algorithms onto the hardware and specify ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for ...
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for ...
Google Asic Design Engineer information
See Texas salary details
$87.6K - $96.7K
16% of jobs
$96.7K - $105.9K
3% of jobs
$105.9K - $115K
4% of jobs
$117.7K is the 25th percentile. Wages below this are outliers.
$115K - $124.2K
6% of jobs
The median wage is $129.9K / yr.
$124.2K - $133.3K
33% of jobs
$133.3K - $142.5K
3% of jobs
$142.5K - $151.6K
2% of jobs
$157.6K is the 75th percentile. Wages above this are outliers.
$151.6K - $160.8K
12% of jobs
$160.8K - $169.9K
5% of jobs
$169.9K - $179K
4% of jobs
$179K - $188.2K
12% of jobs
$87.6K
$139.9K
$188.2K
How much do google asic design engineer jobs pay per year?
What is the difference between Google Asic Design Engineer vs Google FPGA Design Engineer?
| Aspect | Google Asic Design Engineer | Google FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering; experience in ASIC design | Bachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience |
| Work Environment | Designing custom silicon chips for Google products | Developing and testing FPGA prototypes for hardware acceleration |
| Employer & Industry Usage | Primarily in semiconductor and hardware design teams at Google | Hardware prototyping and acceleration teams at Google |
The main difference between a Google Asic Design Engineer and a Google FPGA Design Engineer lies in their focus: ASIC engineers design custom chips for optimized performance, while FPGA engineers develop flexible hardware prototypes using field-programmable gate arrays. Both roles require strong electrical engineering skills but serve different stages of hardware development.
How does a Google ASIC Design Engineer typically collaborate with cross-functional teams during the chip development process?
What does a Google ASIC Design Engineer do?
What are the key skills and qualifications needed to thrive as a Google ASIC Design Engineer, and why are they important?

Meta rating
7.8
Based on 45 frontline employees who took The Breakroom Quiz
136th of 242 rated software companies
Job description
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi...
About Meta
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Industry
Internet and it, media and telecom and software development
Company size
10,000+ Employees
Headquarters location
Menlo Park, CA, US