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Freelance Design Verification Engineer Jobs (NOW HIRING)

Design Verification Engineer

Santa Clara, CA ยท On-site

$159K - $195K/yr

Design Verification Engineer Location:Santa Clara CA Duration: Long term Experience:8-15 Years Description : Key Responsibilities: Strong understanding of SV and UVM and good debugging skills.

Design Verification Engineer

Sunnyvale, CA ยท On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Design verification engineer

San Diego, CA ยท Remote

$139K - $169K/yr

Design Verification Engineer Location: Remote anywhere in the USA and Canada Duration: Full-time (REMOTE) VISA: ONLY USC AND GC We are looking for humble geniuses, who believe that engineering has ...

Design Verification Engineer

Sunnyvale, CA ยท On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Design Verification Engineer

Santa Clara, CA ยท On-site

$159K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...

Design Verification Engineer

San Diego, CA ยท On-site

$144K - $176K/yr

Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong verification skills: test planning, problem solving, debug, adversarial testing. Multimedia Camera Image ...

Design Verification Engineer

Austin, TX ยท On-site

$134K - $164K/yr

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct ...

Design Verification Engineer

Dallas, TX ยท On-site

$123K - $151K/yr

As a Design Verification Engineer, you will work across the full verification cycle - from understanding the system/design intent, developing detailed verification plans and building test benches ...

Design Verification Engineer

San Jose, CA

$159K - $194K/yr

About the role SambaNova Systems is looking for a talented and motivated Design Verification Engineer, DFT to help us build state of the art RDU chips for machine learning and artificial intelligence.

Design Verification Engineer

Palo Alto, CA ยท On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Design Verification Engineer

Knoxville, TN ยท On-site

$129K - $158K/yr

As a Design Verification Engineer, you will work across the full verification cycle - from developing detailed verification plans and building test benches through running coverage regressions ...

Design Verification Engineer

Dallas, TX ยท On-site

$123K - $151K/yr

As a Design Verification Engineer, you will work across the full verification cycle - from understanding the system/design intent, developing detailed verification plans and building test benches ...

Design Verification Engineer

San Diego, CA ยท Remote

$139K - $169K/yr

Design Verification Engineer Location: Remote anywhere in the USA and Canada Duration: Full-time We are looking for humble geniuses, who believe that engineering has the potential to make the ...

Design Verification Engineer

San Jose, CA ยท On-site

$159K - $194K/yr

Design Verification Engineer Location: San Jose, CA - Onsite Contract: 6+ Months with Possible Extension Experience: 8+ years Mandatory Skills: HBM2E/HBM3/HBM3E hands-on verification; SV/UVM; memory ...

New

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Design Verification Engineer

Austin, TX ยท On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Showing results 21-40

Freelance Design Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do freelance design verification engineer jobs pay per year?

As of Sep 9, 2026, the average yearly pay for freelance design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What is the difference between Freelance Design Verification Engineer vs Freelance Hardware Test Engineer?

AspectFreelance Design Verification Engineer

Freelance Design Verification Engineers focus on verifying that hardware designs meet specifications through simulation and testing, often working on FPGA, ASIC, or semiconductor projects. They typically hold certifications in digital design and verification tools, and work in industries like semiconductor, electronics, and tech startups. Freelance Hardware Test Engineers, on the other hand, primarily perform physical testing of hardware prototypes and products, focusing on functional and reliability testing in manufacturing environments. While both roles require technical expertise, verification engineers emphasize simulation and design validation, whereas test engineers focus on real-world hardware testing.

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Infographic showing various Freelance Design Verification Engineer job openings in the United States as of September 2026, with employment types broken down into 74% Full Time, 13% Part Time, and 13% Contract. Highlights an 100% In-person job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

Design Verification Engineer

Santa Clara, CA โ€ข On-site

$159K - $195K/yr

Contractor

Re-posted 13 days ago


Job description

Job Title:Design Verification Engineer
Location:Santa Clara CA
Duration: Long term
Experience:8-15 Years
 
Description:
Key Responsibilities:
Strong understanding of SV and UVM and good debugging skills.
Understanding of AMBA protocols.
Understand design specs and develop test plans based on functional and architectural requirements
Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing
Develop directed and random testcases, perform coverage analysis, and close functional/code coverage
Debug simulation failures and work closely with RTL designers to resolve issues
Execute regression runs, analyze results, and contribute to continuous improvements
Integrate and run power-aware simulations, low power checks, and work with UPF/CPF as needed
Collaborate with DFT/PD/RTL teams and post-silicon validation to ensure design quality across domains
Document test environments, testplans, and results for internal and external reviews