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Epitaxial Engineer Jobs in Oregon (NOW HIRING)

Integration Engineer

Beaverton, OR

$75K - $103K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

The Process Integration Team is seeking an Integration Engineer to join a collaborative and highly ... Photolithography, Plasma etch, Plasma Enhanced Chemical Vapor Deposition (PECVD), Epitaxial growth ...

Integration Engineer

Beaverton, OR · On-site

$75K - $103K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

The Process Integration Team is seeking an Integration Engineer to join a collaborative and highly ... Photolithography, Plasma etch, Plasma Enhanced Chemical Vapor Deposition (PECVD), Epitaxial growth ...

Process Support Engineer

Hillsboro, OR · On-site

$108K - $148K/yr

... epitaxial hardware. * Tailor tool performance to meet specific customer process and integration ... Utilize this knowledge to engineer quick solutions. Business Expertise: * Understand best practices ...

... epitaxial hardware. * Tailor tool performance to meet specific customer process and integration ... Utilize this knowledge to engineer quick solutions. Business Expertise: * Understand best practices ...

Epitaxial Engineer information

See Oregon salary details

$40.2K

$122.5K

$202.5K

How much do epitaxial engineer jobs pay per year?

As of Aug 15, 2026, the average yearly pay for epitaxial engineer in Oregon is $122,502.00, according to ZipRecruiter salary data. Most workers in this role earn between $87,800.00 and $160,200.00 per year, depending on experience, location, and employer.

What is the difference between Epitaxial Engineer vs Semiconductor Process Engineer?

AspectEpitaxial EngineerSemiconductor Process Engineer
Required CredentialsBachelor's or Master's in Materials Science, Electrical Engineering, or related fields; knowledge of epitaxial growth techniquesBachelor's or Master's in Chemical, Electrical, or Materials Engineering; familiarity with semiconductor fabrication processes
Work EnvironmentCleanroom environments focused on thin film deposition and epitaxial layer growthCleanroom settings involved in various semiconductor manufacturing steps
Industry UsagePrimarily in semiconductor fabrication plants focusing on device layer creationAcross semiconductor manufacturing, including process development and optimization

The main difference is that Epitaxial Engineers specialize in growing crystalline layers on substrates, crucial for device performance, while Semiconductor Process Engineers oversee broader manufacturing processes. Both roles require knowledge of semiconductor fabrication, but their focus areas differ within the industry.

What does an epitaxial engineer do?

An Epitaxial Engineer specializes in the process of growing thin crystalline layers (epitaxy) on semiconductor wafers, which is crucial for manufacturing electronic and optoelectronic devices like transistors and LEDs. They are responsible for designing, optimizing, and monitoring epitaxial growth systems, ensuring high-quality material properties and precise layer control. Epitaxial Engineers also troubleshoot equipment, analyze material defects, and collaborate with other engineers to integrate epitaxial layers into device fabrication processes. Their work is vital for advancing semiconductor technology and improving device performance.

What are the key skills and qualifications needed to thrive as an epitaxial engineer?

To thrive as an Epitaxial Engineer, you need a solid background in materials science, semiconductor physics, and chemical engineering, typically with at least a bachelor’s or master’s degree in a relevant field. Familiarity with epitaxial growth systems such as MOCVD or MBE, process control software, and cleanroom protocols is essential, and some roles may require certifications in semiconductor manufacturing. Attention to detail, problem-solving abilities, and effective teamwork are valuable soft skills in this position. These competencies are vital to ensure high-quality wafer production, process optimization, and innovation in semiconductor device fabrication.

What are some typical challenges faced by epitaxial engineers during semiconductor wafer growth, and how are they addressed within a team setting?

Epitaxial Engineers often encounter challenges such as maintaining uniform layer thickness, minimizing defects, and controlling dopant concentrations during wafer growth. These issues require careful monitoring of process parameters and rapid troubleshooting. Collaboration with process engineers, equipment technicians, and quality assurance teams is essential to analyze data, implement corrective actions, and optimize growth recipes. Open communication and regular team meetings help ensure that best practices and lessons learned are shared, leading to continuous improvement in yield and device performance.

What job categories do people searching Epitaxial Engineer jobs in Oregon look for?

The top searched job categories for Epitaxial Engineer jobs in Oregon are:

Infographic showing various Epitaxial Engineer job openings in Oregon as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 100% In-person job distribution, with an average salary of $122,502 per year, or $58.9 per hour.

$75K - $103K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 16 days ago


Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.comand on LinkedIn and X.

The Process Integration Team is seeking an Integration Engineer to join a collaborative and highly technical group of 10-12 engineers with diverse backgrounds and expertise. This team partners closely with process module engineering organizations to identify, troubleshoot, and resolve manufacturing and quality challenges across the semiconductor fabrication process. Team members gain broad exposure to silicon-based semiconductor products, supporting all stages of production from starting silicon through wafer fabrication, assembly, and final packaged die. The role offers a unique opportunity to develop a comprehensive understanding of semiconductor manufacturing while driving yield, quality, and process improvements.

Responsibilities include, but not limited to:

  • Interpreting and responding to electrical signals from Si-based semiconductor devices and establishing connections to process conditions

  • Leading teams of process module engineers to resolve yield and parametric problems

  • Optimization of semiconductor manufacturing processes to improve productivity and/or quality

  • Interpretation of SEM, TEM, and EDX analysis to establish root cause of electrical signals in semiconductor devices

  • Transfer of Si semiconductor processes between manufacturing facilities and to larger wafer diameter in the same facility

  • Teamwork with Product and Defect engineering to identify yield limiters for yield improvement

Minimum qualifications

  • BS or MS in Electrical Engineering or associated engineering field with semiconductor device background

  • 0-3 years of experience working in a cleanroom environment

  • Understanding of CMOS and Bipolar Junction Transistor structures and device operation

  • Knowledge of how process variables influence electrical characteristics of CMOS and BJT devices

  • Ability to work in a team environment with strong written and verbal communication skills

  • Basic understanding of operation of common semiconductor process operations: Photolithography, Plasma etch, Plasma Enhanced Chemical Vapor Deposition (PECVD), Epitaxial growth, Furnace oxidation and Low Pressure Chemical Vapor Deposition (LPCVD), Implant, Chemical Mechanical Polish (CMP), Wet chemical etch, Physical Vapor Deposition (PVD), Rapid Thermal Anneal (RTA)

Preferred qualifications

  • Knowledge of Statistical Process Control (SPC)

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $75,200 to $103,400.
  • Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

  • This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.

  • This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.