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Entry Level Digital Verification Engineer Jobs (NOW HIRING)

Formal Verification Engineer

Austin, TX · On-site

$134K/yr

Description As a formal verification engineer working the complete formal verification for single ... Preferred Qualifications Hands on experience with VLSI and digital logic design and verification ...

Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

This role is for a digital-focused DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification ...

Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

This role is for a digital-focused DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification ...

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ... You will interact with the analog/RF design team, digital DV team digital design team, and wireless ...

CPU DFT Verification Engineer

Santa Clara, CA · On-site

$159K/yr

Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • ... JTAG, MBIST and scan Knowledge of digital logic design, debug feature, and DFT architecture and ...

GPU Design Verification Engineer

Orlando, FL · On-site

$127K - $155K/yr

Experience or coursework in digital design/verification. Experience or coursework with object oriented programming languages. Experience or coursework using HDL simulators and waveform viewers. BS ...

Design Verification Engineer

Los Angeles, CA · On-site

$146K - $178K/yr

This role is for a digital-focused DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification ...

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

Experience or coursework in digital design/verification. Experience or coursework with object oriented programming languages. Experience or coursework using HDL simulators and waveform viewers. BS ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... Preferred Qualifications Methodology & philosophy Knowledge of SystemVerilog, digital simulation ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... Preferred Qualifications Methodology & philosophy Knowledge of SystemVerilog, digital simulation ...

Preferred Qualifications Hands on experience with VLSI and digital logic design and verification ... engineering or related field. Pay & Benefits At Apple, base pay is one part of our total ...

Drive Design Verification to closure based on defined verification metrics on test plan, functional ... and digital expertise. By bringing together technologies and industries, alongside the ...

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Showing results 1-20

Entry Level Digital Verification Engineer information

See salary details

$80K

$142.6K

$203.5K

How much do entry level digital verification engineer jobs pay per year?

As of Jul 21, 2026, the average yearly pay for entry level digital verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.
What are the most commonly searched types of Digital Verification Engineer jobs? The most popular types of Digital Verification Engineer jobs are:
Infographic showing various Entry Level Digital Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 85% Full Time, 12% Part Time, and 3% Contract. Highlights an 89% Physical, 3% Hybrid, and 8% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Formal Verification Engineer

Mirafra Technology

San Diego, CA • On-site

$144K/yr

Full-time

Re-posted 9 days ago


Job description

Company Description

About Mirafra :
Mirafra is software service base organization started in 2004.

     We are 500+ employees in India and 250+ In US
    Clear visibility to senior management which helps for constant professional growth

Job Description

Experience with the following: - ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc. -Design and assertion languages: VHDL, Verilog, System Verilog, and System Verilog Assertions (SVA), Experience with Formal Verification is a must


Qualifications

Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired - Familiar with programming languages: C, C++, and SystemC - Scripting and automation skills: Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management (e.g. CVS, DesignSync, Subversion

Additional Information

All your information will be kept confidential according to EEO guidelines.