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Dft Jobs in Texas (NOW HIRING)

Apple

DFT CAD Engineer

Austin, TX · On-site

As part of our CAD and Methodology team in Apple's world-class Silicon Engineering Group, you will be involved with the complete DFT and ATPG CAD solution for all design projects. - Develop and ...

Apple

DFT CAD Engineer

Austin, TX · On-site

As part of our CAD and Methodology team in Apple's world-class Silicon Engineering Group, you will be involved with the complete DFT and ATPG CAD solution for all design projects. - Develop and ...

Ambiq Micro, Inc.

Sr. Staff Engineer - DFT

Austin, TX · On-site

Scope We are seeking an experienced DFT (Design for Testability) Engineer to design, implement, and optimize test architectures for semiconductor products. This role involves collaborating with ...

Ambiq Micro, Inc.

Sr. Staff Engineer - DFT

Austin, TX · On-site

Scope We are seeking an experienced DFT (Design for Testability) Engineer to design, implement, and optimize test architectures for semiconductor products. This role involves collaborating with ...

Siemens

Senior DFT Consultant (Tessent)

Portland, TX · On-site

Senior DFT Consultant (Tessent) The Design for Test Consultant will be responsible for supporting the use of Tessent DFT software in the design of complex Application Specific Integrated Circuit ...

Siemens

Senior DFT Consultant (Tessent)

Austin, TX · On-site

Senior DFT Consultant (Tessent) The Design for Test Consultant will be responsible for supporting the use of Tessent DFT software in the design of complex Application Specific Integrated Circuit ...

Apple

DFT CAD Engineer

Austin, TX

$184K - $324K/yr

As part of our CAD and Methodology team in Apple's world-class Silicon Engineering Group, you will be involved with the complete DFT and ATPG CAD solution for all design projects. - Develop and ...

Apple

DFT CAD Engineer

Austin, TX

$150K - $277K/yr

As part of our CAD and Methodology team in Apple's world-class Silicon Engineering Group, you will be involved with the complete DFT and ATPG CAD solution for all design projects. - Develop and ...

Apple

DFT CAD Engineer

Austin, TX

$184K - $324K/yr

As part of our CAD and Methodology team in Apple's world-class Silicon Engineering Group, you will be involved with the complete DFT and ATPG CAD solution for all design projects. - Develop and ...

Micron

Staff SoC DFT Engineer, HBM

Richardson, TX · On-site

$146K - $247K/yr

Own SoC-level DFT structures and their implementation. This includes scan, memory built-in self-test (MBIST), logic built-in self-test (LBIST) where applicable, boundary scan (JTAG), and test access ...

Apple

DFT CAD Engineer

Austin, TX

$150K - $277K/yr

As part of our CAD and Methodology team in Apple's world-class Silicon Engineering Group, you will be involved with the complete DFT and ATPG CAD solution for all design projects. - Develop and ...

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$72.8K

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How much do dft jobs pay per year?

As of Aug 23, 2026, the average yearly pay for dft in Texas is $72,762.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,900.00 and $76,400.00 per year, depending on experience, location, and employer.

What is a DFT engineer?

DFT engineers, or Design for Test engineers, are professionals in the semiconductor industry who specialize in designing and implementing testability features in integrated circuits (ICs) and systems-on-chip (SoCs). Their primary role is to ensure that chips can be efficiently and effectively tested for manufacturing defects after fabrication. This involves adding test structures, developing test methodologies, and working closely with design and verification teams to optimize test coverage and reduce the cost of testing. DFT engineers play a critical role in improving product quality and yield in chip manufacturing.

What are the key skills and qualifications needed to thrive as a Design for Test (DFT) engineer?

To thrive as a Design for Test (DFT) Engineer, you need a solid background in digital design, VLSI concepts, and experience with ASIC/FPGA design, typically supported by a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys DFT Compiler, Mentor Tessent, and scripting languages like TCL or Python is essential, along with knowledge of test methodologies like scan insertion and ATPG. Strong problem-solving abilities, attention to detail, and effective communication skills help in debugging complex issues and collaborating across teams. These skills are vital for ensuring high-quality, testable hardware designs that meet production and reliability standards.

What are some common challenges faced by DFT engineers when collaborating with design and verification teams?

DFT engineers often encounter challenges ensuring their test structures integrate seamlessly with the main design and verification flows. Balancing test coverage with minimal impact on design performance requires ongoing communication and compromise. Additionally, DFT engineers must frequently align on methodologies and resolve conflicts between testability requirements and design constraints, making cross-functional teamwork essential for success.

What is the difference between Dft vs Draftsman?

AspectDftDraftsman
Required CredentialsTypically requires a diploma or certification in drafting or engineeringOften requires a diploma or technical training in drafting or architecture
Work EnvironmentWorks in engineering, construction, or manufacturing settingsWorks mainly in architectural or engineering offices
Industry UsageCommonly used in engineering, manufacturing, and construction industriesPrimarily used in architecture and civil engineering sectors
Job FocusDesigning and creating technical drawings for engineering projectsPreparing detailed architectural or structural drawings

In summary, Dft and Draftsman roles share similar skills and work environments, often requiring technical diplomas. Dft typically refers to a broader engineering drafting role, while Draftsman is more focused on architectural drawings. Both are essential in their respective industries for translating concepts into technical plans.

Is DFT a good career?

A DFT (Design for Test) engineer specializes in developing testing methods for electronic circuits and systems, often requiring knowledge of digital and analog testing techniques, CAD tools, and industry standards. It can be a stable career with opportunities in electronics manufacturing, semiconductor, and technology companies, especially for those with strong technical skills and certifications. The role typically involves problem-solving, attention to detail, and staying current with testing technologies.

Is DFT a good place to work?

DFT, as a job title, typically refers to a role such as a Design for Test engineer or a similar technical position. The work environment and job satisfaction depend on the company, industry, and specific role, but these positions often require technical skills and attention to detail. Overall, the suitability of DFT as a workplace varies based on individual preferences and organizational culture.

What are popular job titles related to Dft jobs in Texas?

For Dft jobs in Texas, the most frequently searched job titles are:

What job categories do people searching Dft jobs in Texas look for?

The top searched job categories for Dft jobs in Texas are:

What cities in Texas are hiring for Dft jobs?

Cities in Texas with the most Dft job openings:

Dft jobs near you
Infographic showing various Dft job openings in Texas as of August 2026, with employment types broken down into 95% Full Time, 2% Part Time, 2% Contract, and 1% Nights. Highlights an 92% Physical, 5% Hybrid, and 3% Remote job distribution, with an average salary of $72,762 per year, or $35 per hour.

Staff SoC DFT Engineer, HBM

Micron Technology, Inc

Richardson, TX • On-site

$130 - $160/hr

Other

Re-posted 3 days ago

Micron Technology rating

8.6

Company rating: 8.6 out of 10

Based on 43 frontline employees who took The Breakroom Quiz

28th of 159 rated electronics manufacturers

Job description

Req ID: JR102415 Staff SoC DFT Engineer, HBM

Job Profile(s): Systems Design Engineer 4

Relocation Level: TBD

Responsibilities
  • Own SoC‑level design for test (DFT) architecture and implementation, including scan, memory built‑in self‑test (MBIST), logic built‑in self‑test (LBIST) where applicable, boundary scan (Joint Test Action Group, JTAG), and test access architectures for HBM base‑die designs.
  • Define and drive DFT architecture early in the design cycle, ensuring alignment with SoC integration, floorplanning, timing, power, and physical design requirements.
  • Implement and integrate DFT logic at block, subsystem, and full‑chip levels while partnering closely with register‑transfer level (RTL) design and SoC integration teams.
  • Execute and sign off DFT flows, including linting, clock‑domain crossing (CDC) checks, DFT rule checks, automatic test pattern generation (ATPG) readiness, and coverage closure.
  • Collaborate with physical design teams to optimize DFT solutions for placement, routing, timing closure, and design rule check/layout versus schematic (DRC/LVS) signoff.
  • Work with verification, product engineering, test, probe, and manufacturing teams to ensure testability, diagnosability, smooth pre‑silicon debug, and post‑silicon bring‑up.
  • Partner with computer‑aided design (CAD) and methodology teams to standardize and improve DFT flows, contribute to cross‑group technical reviews, mentor engineers as appropriate, and drive innovation for future HBM generations.
Minimum Qualifications
  • Strong hands‑on experience with SoC design for test (DFT) architecture and implementation, including scan insertion, MBIST/LBIST concepts, boundary scan (JTAG), and ATPG.
  • Experience working across full RTL‑to‑GDS SoC flows and collaborating with synthesis, static timing analysis (STA), and physical design teams.
  • Proficiency using industry‑standard electronic design automation (EDA) tools from Siemens, Synopsys, and/or Cadence for DFT and implementation.
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
  • Seven or more years of relevant experience in SoC design, DFT, or implementation for complex digital application‑specific integrated circuits (ASICs) or SoCs.
Preferred Qualifications
  • Experience with large, complex SoCs that integrate multiple intellectual property (IP) blocks and subsystems.
  • Strong RTL debugging, design analysis, and problem‑solving skills.
  • Experience using scripting languages such as Python, Tcl, or Perl for flow automation.
  • Ability to communicate clearly and collaborate effectively across global, cross‑functional teams.
  • Familiarity with memory systems such as dynamic random‑access memory (DRAM), high‑bandwidth memory (HBM), and related JEDEC specifications.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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