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Design Engineer Pcie Jobs (NOW HIRING)

Phizenix

Digital Design Engineer

Santa Clara, CA · On-site

$159K/yr

... g., PCIe, UCIe) into the SoC/ASIC. * Drive the full implementation flow: synthesis, timing ... Engineering (or related), with relevant digital ASIC design experience. * Demonstrated experience ...

Astera Labs

Tech Lead Design Engineer

San Jose, CA · On-site

$185K - $240K/yr

Astera Labs' Intelligent Connectivity Platform integrates CXL ® , Ethernet, NVLink, PCIe ® , and ... Astera Labs is hiring a Tech Lead Design Engineer to help architect and deliver the connectivity ...

Phizenix

Digital Design Engineer

Santa Clara, CA

$180K - $250K/yr

... g., PCIe, UCIe) into the SoC/ASIC. * Drive the full implementation flow: synthesis, timing ... Engineering (or related), with relevant digital ASIC design experience. * Demonstrated experience ...

Belcan

Digital Design Engineer

Tucson, AZ

$97.16/hr

Digital Design Engineer Location: Tucson, AZ Zip Code: 85756 Duration: 12 Months Pay Rate: $97.16 ... PCIe, Ethernet, I2C, SPI, and UART. The candidate will be working in a collaborative team ...

Phizenix

Digital Design Engineer

Irvine, CA

$180K - $250K/yr

... g., PCIe, UCIe) into the SoC/ASIC. * Drive the full implementation flow: synthesis, timing ... Engineering (or related), with relevant digital ASIC design experience. * Demonstrated experience ...

Long Wall

FPGA Design Engineer

Long Beach, CA · On-site

$129K - $178K/yr

The best engineers, corporate professionals, and technicians make their teammates better. Knowing ... PCIe (Gen 1/2/3/4/5), 1G/10G/25G Ethernet MAC/PHY layers (SGMII, RGMII, UXSGMII) * Design and ...

Arista Networks

PCIe Software Engineer

Nashua, NH · On-site

PCIe software engineers write the code that manages high speed communication between hardware components in our switches. We work with hardware, diagnostics, and software engineers to maximize ...

Arista Networks

PCIe Software Engineer

Austin, TX · On-site

PCIe software engineers write the code that manages high speed communication between hardware components in our switches. We work with hardware, diagnostics, and software engineers to maximize ...

Long Wall

FPGA Design Engineer

Long Beach, CA

$135K - $225K/yr

The best engineers, corporate professionals, and technicians make their teammates better. Knowing ... PCIe (Gen 1/2/3/4/5), 1G/10G/25G Ethernet MAC/PHY layers (SGMII, RGMII, UXSGMII) * Design and ...

Insight Global

Digital Design Engineer

Tucson, AZ · On-site

$130K - $193K/yr

Digital Design Engineer Duration: 12 Month Contract - Possible to Extend or Convert Location ... PCIe, Ethernet, I2C, SPI, and UART. The candidate will be working in a collaborative team ...

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Design Engineer Pcie information

See salary details

$40.5K

$88.2K

$158.5K

How much do design engineer pcie jobs pay per year?

As of Aug 22, 2026, the average yearly pay for design engineer pcie in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.

What is a design engineer PCIe?

Design Engineer PCIe jobs involve designing, developing, and testing hardware and systems that utilize PCI Express (PCIe) technology for high-speed data transfer. These engineers work on creating circuit boards, verifying PCIe interfaces, and ensuring compliance with industry standards. Their role often includes collaborating with software and hardware teams to optimize system integration and performance. Design Engineer PCIe professionals are crucial in industries like computing, networking, and storage solutions, where reliable and fast data communication is essential.

What are some typical challenges a design engineer PCIe faces when integrating PCIe interfaces into new hardware products?

As a Design Engineer PCIe, you will often encounter challenges related to ensuring signal integrity and compatibility when integrating PCIe interfaces into hardware designs. This can involve addressing issues like high-speed signal routing, managing power consumption, and ensuring compliance with PCIe standards. Collaboration with firmware, hardware, and verification teams is common to resolve interoperability issues and optimize performance. Staying updated on the latest PCIe specifications and debugging complex system-level problems are also key aspects of the role.

What are the key skills and qualifications needed to thrive as a design engineer PCIe, and why are they important?

To excel as a Design Engineer specializing in PCIe, you need a solid background in electrical or computer engineering, with expertise in high-speed digital design and thorough knowledge of PCI Express protocols. Proficiency with hardware design tools such as Cadence or Synopsys, simulation tools, and familiarity with industry standards like PCIe specifications are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set top engineers apart. These competencies ensure robust, reliable hardware designs that meet performance standards and integrate seamlessly into complex systems.

What is the difference between Design Engineer Pcie vs Design Engineer Usb?

AspectDesign Engineer PcieDesign Engineer Usb
Required SkillsPCIe protocol, hardware design, FPGA/ASIC developmentUSB standards, hardware design, FPGA/ASIC development
Work EnvironmentSemiconductor companies, hardware development labsConsumer electronics, peripheral device companies
CertificationsRelevant hardware design certifications, industry experienceSimilar certifications, focus on interface standards

Both Design Engineer Pcie and Design Engineer Usb roles involve hardware interface design, requiring similar skills and certifications. The main difference lies in the specific protocols and standards they work with: PCIe for high-speed data transfer in computers and servers, and USB for peripheral connectivity. Their work environments and industry applications also differ, with PCIe roles often in enterprise hardware and USB roles in consumer electronics.

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Design Engineer Pcie jobs near you
Infographic showing various Design Engineer Pcie job openings in the United States as of August 2026, with employment types broken down into 89% Full Time, 7% Part Time, and 4% Contract. Highlights an 83% Physical, 5% Hybrid, and 12% Remote job distribution, with an average salary of $88,150 per year, or $42.4 per hour.

Senior FPGA Design Engineer

Hirekeyz Inc

Yorktown Heights, NY • Remote

$125K - $173K/yr

Contractor

Re-posted 3 days ago

Job description

Role: Senior FPGA Design Engineer

Location: Remote

Duration: 12+ Months Contract

Job Summary:

Research team has a need for an Electrical Engineer highly experienced in the design and implementation of complex functions and solutions in FPGAs. Candidates must have an extensive knowledge of Verilog or VHDL;  they must possess the skills and experience customizing and integrating third-party IP, executing timing driven synthesis, running simulations, and performing design validation. Strong candidates will have design experience or a proficient understanding of the PCIe or Interlaken interface standards. Knowledge and fluency designing Xilinx FPGAs using the Vivado Design Suite is highly desirable.

  

Job Duties:

  • Job Duty 1 – Design (and implement) PCIe-to-Interlaken section of the Host FPGA Data Path. Interlaken is IP licensed from third-party.
  • Job Duty 2 -  Work with ASIC team to implement Host FPGA Interlaken interface to the ASIC’s Interlaken interface.
  • Job Duty 3 -  Work with Software team and Electronics Design team to test and verify functionality of entire data path from the Front-end Host to the Interlaken interface on the Host FPGA.
  • Job Duty 4 – Validate full data path between the Front-end Host and the ASIC S-Tree is functioning as designed.
  • Job Duty 5 – Optimize design for performance improvements.
  • Job Duty 6 – Write technical documentation describing FPGA architecture, its functional blocks and the data flow to and from the Host and ASIC.

Basic Skills, clearances and other elements required, in order of importance, and number of years’ experience, where applicable,  in each skill:

  • Bachelor’s or Master’s degree in Electrical Engineering.
  • Minimum of 10 years’ experience.
  • Design an FPGA based on functionality requirements and third-party IP for standardized interfaces; Implement design in Verilog or VHDL, synthesize FPGA, achieve timing closure, debug FPGA’s functionality in the system. (10 years).
  • Understanding of PCIe and how the interface works; Understanding of Interlaken and how the interface works.  (5 years).
  • Experience working with high-speed serial communication protocols.  Working with interfaces and logic blocks in different clock domains.  Design of clock trees for high-speed serial protocols. (10 years).
  • Design data structures and control mechanisms for transferring high-speed serial data between two protocols in different clock domains, i.e., queueing and/or buffer management.  (10 years).
  • Ability to work other design team which will interface with the FPGA or run Software using the FPGA logic.  Build a collaborative relationship with other team members..
  • Good communication skills, both written and verbal.
  • Demonstrated success working on a complex, tightly scheduled next-generation design where others depend on your work to progress.
  • Familiarity with Linux. 
  • Experience writing Python scripts.
  • Other: Show initiative by reading data sheets, specifications and other technical documentation.

 

Other Skills Desired, Years in each skill, where applicable:

  • Experience working with remote team members.
  • Exhibit eagerness to shorten learning curve and engage team members early.