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Design Engineer Pcie Jobs (NOW HIRING)

Astera Labs

Principal Digital Design Engineer

San Jose, CA · On-site

$185K - $230K/yr

We are looking for Principal Digital Design Engineers with experience developing micro-architecture ... Hands-on, thorough knowledge of high-speed protocols like PCIe, Ethernet, Infiniband, DDR, NVMe ...

Unigen

Senior Hardware Design Engineer

Newark, CA · On-site

$130K - $150K/yr

Senior Hardware Design Engineer Reports To: Sr. Director, Hardware & Systems Engineering Job ... and PCIe Gen 5/6. * Power & Signal Integrity: Define and optimize robust board-level power ...

Sapsol Technologies Inc

Analog Design Engineer

$206K/yr

... PCIe, SPI, I2C, UART, GPIO, DDR, Ethernet, ARINC, 1553, etc.) • High-speed interface design and ... Engineering, Operations, and Quality teams for defect resolution • Drive design and process ...

Infoyogi LLC

ASIC/RTL Design Engineer

San Jose, CA

The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE ... Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip ...

Arista Networks

PCIe Software Engineer

Austin, TX · On-site

PCIe software engineers write the code that manages high speed communication between hardware components in our switches. We work with hardware, diagnostics, and software engineers to maximize ...

AVTC Group

Digital Design Engineer

Tucson, AZ · On-site

$128K/yr

... PCIe, Ethernet, I2C, SPI, and UART. The candidate will be working in a collaborative team ... of engineering digital circuit design experience to include at least 2 of the following:

MKS2 Technologies

Digital Design Engineer

Tucson, AZ

$90K - $100K/yr

Digital Design Engineer - Secret Clearance Required Location: Tucson, AZ (On-site) Job Type: W-2 ... PCIe * Ethernet * I2C, SPI, UART * Support full lifecycle development from: * Concept and ...

Chipton Ross

FPGA/ASIC Design Engineer

Camden, NJ · On-site

$124K - $171K/yr

Job #215247 Chipton-Ross is seeking an FPGA/ASIC Design Engineer for a contract opportunity in ... Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet). PHYSICAL REQUIREMENTS (if noted by ...

TecTammina

FPGA Design Engineer

New York, NY

$134K - $185K/yr

Company Description Tech Tammina LLC Looking for an FPGA Design Engineer - Consultant to help ... Practical knowledge in PCIe, DRAM, DMA sub-systems. Well versed in using Quartas and ModelSym.

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All JobsDesign Engineer Pcie Jobs

Design Engineer Pcie information

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$40.5K

$88.2K

$158.5K

How much do design engineer pcie jobs pay per year?

As of Jun 21, 2026, the average yearly pay for design engineer pcie in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.

What are some typical challenges a Design Engineer PCIe faces when integrating PCIe interfaces into new hardware products?

As a Design Engineer PCIe, you will often encounter challenges related to ensuring signal integrity and compatibility when integrating PCIe interfaces into hardware designs. This can involve addressing issues like high-speed signal routing, managing power consumption, and ensuring compliance with PCIe standards. Collaboration with firmware, hardware, and verification teams is common to resolve interoperability issues and optimize performance. Staying updated on the latest PCIe specifications and debugging complex system-level problems are also key aspects of the role.

What are the key skills and qualifications needed to thrive as a Design Engineer (PCIe), and why are they important?

To excel as a Design Engineer specializing in PCIe, you need a solid background in electrical or computer engineering, with expertise in high-speed digital design and thorough knowledge of PCI Express protocols. Proficiency with hardware design tools such as Cadence or Synopsys, simulation tools, and familiarity with industry standards like PCIe specifications are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set top engineers apart. These competencies ensure robust, reliable hardware designs that meet performance standards and integrate seamlessly into complex systems.

What are Design Engineer PCIe jobs?

Design Engineer PCIe jobs involve designing, developing, and testing hardware and systems that utilize PCI Express (PCIe) technology for high-speed data transfer. These engineers work on creating circuit boards, verifying PCIe interfaces, and ensuring compliance with industry standards. Their role often includes collaborating with software and hardware teams to optimize system integration and performance. Design Engineer PCIe professionals are crucial in industries like computing, networking, and storage solutions, where reliable and fast data communication is essential.

What is the difference between Design Engineer Pcie vs Design Engineer Usb?

AspectDesign Engineer PcieDesign Engineer Usb
Required SkillsPCIe protocol, hardware design, FPGA/ASIC developmentUSB standards, hardware design, FPGA/ASIC development
Work EnvironmentSemiconductor companies, hardware development labsConsumer electronics, peripheral device companies
CertificationsRelevant hardware design certifications, industry experienceSimilar certifications, focus on interface standards

Both Design Engineer Pcie and Design Engineer Usb roles involve hardware interface design, requiring similar skills and certifications. The main difference lies in the specific protocols and standards they work with: PCIe for high-speed data transfer in computers and servers, and USB for peripheral connectivity. Their work environments and industry applications also differ, with PCIe roles often in enterprise hardware and USB roles in consumer electronics.

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Design Engineer Pcie jobs near you
Senior ASIC Design Engineer with Security Clearance

Senior ASIC Design Engineer with Security Clearance

Zachary Piper Solutions, LLC

Saratoga, CA

$250K - $290K/yr

Other

Medical, Dental, Vision, Retirement, PTO

Posted 24 days ago

Job description

Piper Companies is looking for a Senior ASIC Design Engineer to join a cutting-edge AI networking company onsite in Saratoga, CA Monday - Friday , to help define and build the next generation of high-performance networking ASICs. The ideal Senior ASIC Design Engineer will bridge the gap between high-level system design and ASIC implementation to help shape the future of data communication. Responsibilities for the Senior ASIC Design Engineer: * Work with the CTO and engineering teams to translate system-level requirements into detailed ASIC architecture.

* Lead architectural modeling and analysis to ensure optimal throughput, latency, and power efficiency. * Collaborate with RTL, Verification, Physical Design, and Firmware teams to ensure seamless implementation. * Drive integration of high-speed I/O and third-party IPs into the ASIC design.

Qualifications for Senior ASIC Design Engineer: * 10+ years of experience as an Chip Architect, preferably in networking or high-performance computing (Routers, Switches, GPU, CPU, Data Center, etc) * Must be eligible to work in the United States and obtain and maintain an Active U.S. Government Secret Clearance. * Deep understanding of networking protocols (Ethernet, TCP/IP, VLAN, MPLS, RoCE) and their hardware implications.

* Proven experience in architecture design, performance modeling, and architectural trade-offs. * Familiarity with high-speed I/O (PCIe Gen5/Gen6, SerDes) and software control plane interfaces. * Experience across the full ASIC development lifecycle-from concept to silicon validation.

* Master's degree in Electrical Engineering or related field required. Compensation/Benefits for the Senior ASIC Design Engineer: * Salary Range: $250,000 - $290,000 annually (based on experience and qualifications) * Comprehensive Benefits: Medical, Dental, Vision, 401K, PTO, Sick Leave (if required by law), and Holidays This job opens for applications on 6/15/2026. Applications for this job will be accepted for at least 30 days from the posting date.

Keywords: ASIC, ASIC Architect, Networking ASIC, AI Networking, Design, Microarchitecture, Performance Modeling, PCIe, SerDes, Ethernet, TCP/IP, RoCE, High-Speed Datapath, Silicon Validation, System-on-Chip, SoC Architecture, Hardware Design, IP Integration, Physical Design, Firmware Interface, Chip Architect, DPU, CPU, SOC #LI-BR1 #LI-ON SITE

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