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Design Engineer Pcie Jobs in Texas (NOW HIRING)

Cornelis Networks

PCIe ASIC Design Engineer

Austin, TX · On-site

Cornelis Networks is hiring a Senior ASIC Design Engineer to lead the design and integration of PCIe controllers into our next-generation SoCs. The ideal candidate will have deep expertise in PCI ...

Arista Networks

PCIe Software Engineer

Austin, TX

PCIe software engineers write the code that manages high speed communication between hardware components in our switches. We work with hardware, diagnostics, and software engineers to maximize ...

Arista Networks

PCIe Software Engineer

Austin, TX · On-site

PCIe software engineers write the code that manages high speed communication between hardware components in our switches. We work with hardware, diagnostics, and software engineers to maximize ...

Apple

IC Package Design Engineer

Austin, TX · On-site

$134K/yr

Description As a Package design engineer, you will lead advanced package architecture, drive next ... Strong understanding of high-speed interface layout constraints (DDR, PCIe) and Signal/Power ...

ARM

Senior Design Engineer

Austin, TX · Hybrid

$161K - $218K/yr

As a creative design engineer with a knowledge of I/O subsystems, SoCs you will be part of a team integrating PCIe, DDR and other IP's for SoCs. * Collaborate with the project team to understand and ...

ARM

Senior Design Engineer

Austin, TX · On-site

$161K - $218K/yr

As a creative design engineer with a knowledge of I/O subsystems, SoCs you will be part of a team integrating PCIe, DDR and other IP's for SoCs. * Collaborate with the project team to understand and ...

Apple

IC Package Design Engineer

Austin, TX

$175K - $308K/yr

Description As a Package design engineer, you will lead advanced package architecture, drive next ... Strong understanding of high-speed interface layout constraints (DDR, PCIe) and Signal/Power ...

Apple

IC Package Design Engineer

Austin, TX

$175K - $308K/yr

Description As a Package design engineer, you will lead advanced package architecture, drive next ... Strong understanding of high-speed interface layout constraints (DDR, PCIe) and Signal/Power ...

Apple

IC Package Design Engineer

Austin, TX

$175K - $308K/yr

Description As a Package design engineer, you will lead advanced package architecture, drive next ... Strong understanding of high-speed interface layout constraints (DDR, PCIe) and Signal/Power ...

Nvidia Corporation

Senior Firmware PCIe Engineer

Austin, TX · On-site

$118K - $156K/yr

Partner with our Chip Design, Software, and Architecture engineers to find root causes and develop ... Direct experience with PCIe switch architecture and firmware. * Deep knowledge of hardware ...

Cisco

Hardware Design Engineer

Austin, TX · On-site

$115K - $163K/yr

The engineer will contribute across design, validation, manufacturing, and sustaining activities ... Experience with interface protocols such as PCIe, USB, eMMC, I2C, MDIO, and Ethernet. * Experience ...

Nvidia

Senior Firmware PCIe Engineer

Austin, TX · On-site

$118K - $156K/yr

Partner with our Chip Design, Software, and Architecture engineers to find root causes and develop ... Direct experience with PCIe switch architecture and firmware. * Deep knowledge of hardware ...

Cisco

Hardware Design Engineer

Austin, TX · On-site

$115K - $163K/yr

The engineer will contribute across design, validation, manufacturing, and sustaining activities ... Experience with interface protocols such as PCIe, USB, eMMC, I2C, MDIO, and Ethernet. * Experience ...

Firefly Aerospace

FPGA Design Engineer III

Cedar Park, TX · On-site

$115K - $159K/yr

Design, develop, and verify FPGA logic using VHDL/Verilog/SystemVerilog for Microchip PolarFire SoCs, including programmable logic, DSP blocks, and high-speed interfaces (e.g., PCIe, Ethernet, SERDES)

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All JobsDesign Engineer Pcie JobsDesign Engineer Pcie Jobs in Texas

Design Engineer Pcie information

What are some typical challenges a design engineer PCIe faces when integrating PCIe interfaces into new hardware products?

As a Design Engineer PCIe, you will often encounter challenges related to ensuring signal integrity and compatibility when integrating PCIe interfaces into hardware designs. This can involve addressing issues like high-speed signal routing, managing power consumption, and ensuring compliance with PCIe standards. Collaboration with firmware, hardware, and verification teams is common to resolve interoperability issues and optimize performance. Staying updated on the latest PCIe specifications and debugging complex system-level problems are also key aspects of the role.

What are the key skills and qualifications needed to thrive as a design engineer PCIe, and why are they important?

To excel as a Design Engineer specializing in PCIe, you need a solid background in electrical or computer engineering, with expertise in high-speed digital design and thorough knowledge of PCI Express protocols. Proficiency with hardware design tools such as Cadence or Synopsys, simulation tools, and familiarity with industry standards like PCIe specifications are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set top engineers apart. These competencies ensure robust, reliable hardware designs that meet performance standards and integrate seamlessly into complex systems.

What is a design engineer PCIe?

Design Engineer PCIe jobs involve designing, developing, and testing hardware and systems that utilize PCI Express (PCIe) technology for high-speed data transfer. These engineers work on creating circuit boards, verifying PCIe interfaces, and ensuring compliance with industry standards. Their role often includes collaborating with software and hardware teams to optimize system integration and performance. Design Engineer PCIe professionals are crucial in industries like computing, networking, and storage solutions, where reliable and fast data communication is essential.

What is the difference between Design Engineer Pcie vs Design Engineer Usb?

AspectDesign Engineer PcieDesign Engineer Usb
Required SkillsPCIe protocol, hardware design, FPGA/ASIC developmentUSB standards, hardware design, FPGA/ASIC development
Work EnvironmentSemiconductor companies, hardware development labsConsumer electronics, peripheral device companies
CertificationsRelevant hardware design certifications, industry experienceSimilar certifications, focus on interface standards

Both Design Engineer Pcie and Design Engineer Usb roles involve hardware interface design, requiring similar skills and certifications. The main difference lies in the specific protocols and standards they work with: PCIe for high-speed data transfer in computers and servers, and USB for peripheral connectivity. Their work environments and industry applications also differ, with PCIe roles often in enterprise hardware and USB roles in consumer electronics.

What are popular job titles related to Design Engineer Pcie jobs in Texas? For Design Engineer Pcie jobs in Texas, the most frequently searched job titles are:
What job categories do people searching Design Engineer Pcie jobs in Texas look for? The top searched job categories for Design Engineer Pcie jobs in Texas are:
What cities in Texas are hiring for Design Engineer Pcie jobs? Cities in Texas with the most Design Engineer Pcie job openings:
Design Engineer Pcie jobs near you
Infographic showing various Design Engineer Pcie job openings in Texas as of August 2026, with employment types broken down into 1% Internship, 85% Full Time, 9% Part Time, and 5% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution.

PCIe ASIC Design Engineer

Cornelis Networks

Austin, TX • On-site

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 26 days ago

Job description

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.
Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world's most demanding computational challenges with our next-generation networking solutions.
We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.
Cornelis Networks is hiring a Senior ASIC Design Engineer to lead the design and integration of PCIe controllers into our next-generation SoCs. The ideal candidate will have deep expertise in PCI Express protocol (Gen4/Gen5/Gen6), integration into high performance ASICs, emulation and post silicon bring-up.
Key Responsibilities:
  • Own end-to-end integration of PCIe IP into complex ASIC designs.
  • Collaborate with IP vendors, architecture, verification, physical design, and software teams to deliver robust PCIe subsystems.
  • Drive performance optimization efforts across the PCIe stack, from PHY tuning to DMA/transaction layer efficiency.
  • Contribute to system architecture and microarchitecture discussions with a focus on IO and interconnect scalability.
  • Lead silicon bring-up and validation of PCIe links in the lab; work closely with board and firmware teams.
  • Debug functional and performance issues at RTL, gate-level, and silicon.
  • Ensure compliance with PCIe specifications and participate in interoperability testing where needed.
  • Provide mentorship to junior engineers and help define PCIe subsystem development best practices.
  • Good understanding of high-bandwidth, low-latency connectivity for high-performance compute platforms

Minimum Qualifications:
  • BS/MS in Electrical Engineering, Computer Engineering, or related field.
  • 10+ years of industry experience in ASIC/SoC design with a focus on PCIe controller integration.
  • Proven experience in silicon bring-up and debug of high-speed interfaces.
  • Solid understanding of PCIe protocol stack (PHY, MAC, TLP, DLL), configuration space, and link training.
  • Hands-on experience with PCIe verification environments, performance tuning, and power-aware design.
  • Familiarity with PCIe compliance testing, simulation tools (e.g., VCS, Questa), and lab equipment (e.g., protocol analyzers, oscilloscopes).
  • Strong scripting (Python, Perl, TCL) and debugging skills.
  • Strong verbal and written communication skills.

Preferred Qualifications:
  • Experience with PCIe Gen5/Gen6 and advanced retimer or switch solutions.
  • Exposure to CXL, CCIX, or other cache-coherent interconnects.
  • Background in data center or AI/ML accelerator architectures.
  • Experience with emulation and prototyping platforms (e.g., ZeBu, Palladium, HAPS) for PCIe subsystem validation.

Location: This is a remote position for employees residing within the United States.
We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.
At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.
In addition to your base pay, you'll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.
Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

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