We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group ... Craft micro-architecture specification, implement in high-quality RTL, and deliver a fully verified ...
We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group ... Craft micro-architecture specification, implement in high-quality RTL, and deliver a fully verified ...
New Graduate Engineer, Silicon Engineering
Redmond, WA · On-site
$145K - $200K/yr
NEW GRADUATE ENGINEER, SILICON ENGINEERING Are you an engineering student graduating in fall or ... Contribute towards design architecture, RTL implementation and/or verification, and emulation
New Graduate Engineer, Silicon Engineering
Redmond, WA · On-site
$145K - $200K/yr
NEW GRADUATE ENGINEER, SILICON ENGINEERING Are you an engineering student graduating in fall or ... Contribute towards design architecture, RTL implementation and/or verification, and emulation
Senior ASIC Emulation Engineer
Seattle, WA · On-site
$170K - $250K/yr
You will work closely with architecture, RTL design, DFT, DV, firmware, physical design, and ... Work with RTL engineers to compile, map, and optimize designs for emulation performance, capacity ...
Senior ASIC Emulation Engineer
Seattle, WA · On-site
$170K - $250K/yr
You will work closely with architecture, RTL design, DFT, DV, firmware, physical design, and ... Work with RTL engineers to compile, map, and optimize designs for emulation performance, capacity ...
Senior FPGA Engineer
Redmond, WA · On-site
$215K - $250K/yr
Kapta Space is seeking a Senior FPGA Engineer to lead RTL design and FPGA development for radar operation and algorithm implementation. Kapta Space is seeking FPGA Engineers with experience in ...
Senior FPGA Engineer
Redmond, WA · On-site
$215K - $250K/yr
Kapta Space is seeking a Senior FPGA Engineer to lead RTL design and FPGA development for radar operation and algorithm implementation. Kapta Space is seeking FPGA Engineers with experience in ...
Senior FPGA Engineer
Redmond, WA · On-site
$215K - $250K/yr
Kapta Space is seeking a Senior FPGA Engineer to lead RTL design and FPGA development for radar operation and algorithm implementation. Kapta Space is seeking FPGA Engineers with experience in ...
Senior FPGA Engineer
Redmond, WA · On-site
$215K - $250K/yr
Kapta Space is seeking a Senior FPGA Engineer to lead RTL design and FPGA development for radar operation and algorithm implementation. Kapta Space is seeking FPGA Engineers with experience in ...
Senior FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Overview Blue Origin is seeking a Senior FPGA Design and Verification Engineer to develop the ... Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog. * Experience implementing ...
Senior FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Overview Blue Origin is seeking a Senior FPGA Design and Verification Engineer to develop the ... Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog. * Experience implementing ...
Senior FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Overview Blue Origin is seeking a Senior FPGA Design and Verification Engineer to develop the ... Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog. * Experience implementing ...
Senior FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Overview Blue Origin is seeking a Senior FPGA Design and Verification Engineer to develop the ... Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog. * Experience implementing ...
Design Verification Engineer (Silicon Engineering)
Redmond, WA · On-site
$145K - $195K/yr
RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ... Design Verification Engineer/Level I: $125,000.00 - $145,000.00/per year Design Verification ...
Design Verification Engineer (Silicon Engineering)
Redmond, WA · On-site
$145K - $195K/yr
RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ... Design Verification Engineer/Level I: $125,000.00 - $145,000.00/per year Design Verification ...
Quantum Systems Digital Design Engineer II
Redmond, WA · On-site
$152K/yr
As a Quantum Systems Digital Design Engineer II , you'll collaborate closely with quantum ... Design & implement RTL for streaming, low-latency pipelines (e.g., readout classifiers, syndrome ...
Quantum Systems Digital Design Engineer II
Redmond, WA · On-site
$152K/yr
As a Quantum Systems Digital Design Engineer II , you'll collaborate closely with quantum ... Design & implement RTL for streaming, low-latency pipelines (e.g., readout classifiers, syndrome ...
Senior ASIC Physical Design Engineer
Seattle, WA · On-site
$170K - $250K/yr
... RTL, verification, and packaging teams. You'll be a key contributor in achieving timing closure ... Computer Engineering, or related field. * 5-10 years of experience in ASIC physical design for ...
Senior ASIC Physical Design Engineer
Seattle, WA · On-site
$170K - $250K/yr
... RTL, verification, and packaging teams. You'll be a key contributor in achieving timing closure ... Computer Engineering, or related field. * 5-10 years of experience in ASIC physical design for ...
Senior Staff RTL Verification Engineer
$158K - $238K/yr
Team Overview The RAIN Reader IC (RIC) design group is part of the Impinj Silicon Engineering ... Within the RIC Design group, the digital team owns the digital subsystems of these products ...
Quick apply
Senior Staff RTL Verification Engineer
$158K - $238K/yr
Team Overview The RAIN Reader IC (RIC) design group is part of the Impinj Silicon Engineering ... Within the RIC Design group, the digital team owns the digital subsystems of these products ...
Design Verification Engineer (Silicon Engineering)
Redmond, WA · On-site
$145K - $195K/yr
DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in ... RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ...
Design Verification Engineer (Silicon Engineering)
Redmond, WA · On-site
$145K - $195K/yr
DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in ... RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ...
Principal Design Verification Engineer (Silicon Engineering)
Redmond, WA · On-site
$210K - $335K/yr
RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ... Design Verification Engineer / Principal: $210,000.00 - $335,000.00/per year Your actual level and ...
Principal Design Verification Engineer (Silicon Engineering)
Redmond, WA · On-site
$210K - $335K/yr
RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ... Design Verification Engineer / Principal: $210,000.00 - $335,000.00/per year Your actual level and ...
Senior Silicon Physical Design Engineer - TeraWave
Seattle, WA · On-site
$230K - $322K/yr
Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor ... Computer Engineering, or related field * 7+ years of experience in physical design of ASICs
Senior Silicon Physical Design Engineer - TeraWave
Seattle, WA · On-site
$230K - $322K/yr
Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor ... Computer Engineering, or related field * 7+ years of experience in physical design of ASICs
Senior Design Verification Engineer - TeraWave
Seattle, WA · On-site
$230K - $322K/yr
The work spans IP, subsystem, and full SoC verification, including CPU subsystems, performance ... Experience verifying complex digital control and datapath logic, including RTL and system-level ...
Senior Design Verification Engineer - TeraWave
Seattle, WA · On-site
$230K - $322K/yr
The work spans IP, subsystem, and full SoC verification, including CPU subsystems, performance ... Experience verifying complex digital control and datapath logic, including RTL and system-level ...
Senior Avionics FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Create and implement RTL code for critical SoC blocks and interfaces * Contribute to architecture ... Engineering, or a related discipline * 7+ years of experience in digital design and SoC ...
Senior Avionics FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Create and implement RTL code for critical SoC blocks and interfaces * Contribute to architecture ... Engineering, or a related discipline * 7+ years of experience in digital design and SoC ...
Sr. ASIC Design Verification Engineer (Silicon Engineering)
Redmond, WA · On-site
$165K - $260K/yr
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ...
Sr. ASIC Design Verification Engineer (Silicon Engineering)
Redmond, WA · On-site
$165K - $260K/yr
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ...
Senior Avionics FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Create and implement RTL code for critical SoC blocks and interfaces * Contribute to architecture ... Engineering, or a related discipline * 7+ years of experience in digital design and SoC ...
Senior Avionics FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Create and implement RTL code for critical SoC blocks and interfaces * Contribute to architecture ... Engineering, or a related discipline * 7+ years of experience in digital design and SoC ...
Senior Avionics FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Create and implement RTL code for critical SoC blocks and interfaces * Contribute to architecture ... Engineering, or a related discipline * 7+ years of experience in digital design and SoC ...
Senior Avionics FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Create and implement RTL code for critical SoC blocks and interfaces * Contribute to architecture ... Engineering, or a related discipline * 7+ years of experience in digital design and SoC ...
Senior Avionics FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Create and implement RTL code for critical SoC blocks and interfaces * Contribute to architecture ... Engineering, or a related discipline * 7+ years of experience in digital design and SoC ...
Senior Avionics FPGA Design & Verification Engineer - TeraWave
Seattle, WA · On-site
$156K - $219K/yr
Create and implement RTL code for critical SoC blocks and interfaces * Contribute to architecture ... Engineering, or a related discipline * 7+ years of experience in digital design and SoC ...
Cpu Rtl Design Engineer information
See Seattle, WA salary details
$46.1K - $58.3K
2% of jobs
$58.3K - $70.5K
11% of jobs
$77K is the 25th percentile. Wages below this are outliers.
$70.5K - $82.7K
23% of jobs
The median wage is $90.6K / yr.
$82.7K - $94.9K
22% of jobs
$94.9K - $107.1K
17% of jobs
$107.5K is the 75th percentile. Wages above this are outliers.
$107.1K - $119.3K
9% of jobs
$119.3K - $131.6K
6% of jobs
$131.6K - $143.8K
3% of jobs
$143.8K - $156K
3% of jobs
$156K - $168.2K
2% of jobs
$168.2K - $180.4K
1% of jobs
$46.1K
$100.3K
$180.4K
How much do cpu rtl design engineer jobs pay per year?
What is a CPU RTL design engineer?
What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?
What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?
What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?
| Aspect | Cpu Rtl Design Engineer | Cpu Verification Engineer |
|---|---|---|
| Primary Focus | Designing and developing RTL code for CPU components | Verifying and testing RTL designs for correctness |
| Skills & Certifications | HDL languages (Verilog/VHDL), FPGA/ASIC design experience | HDL, testbench development, simulation tools |
| Work Environment | Design teams, hardware development labs | Verification teams, simulation environments |
| Industry Usage | Semiconductor companies, CPU design firms | ASIC/FPGA verification, chip validation |
While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Seattle, WA?
For Cpu Rtl Design Engineer jobs in Seattle, WA, the most frequently searched job titles are:
What job categories do people searching Cpu Rtl Design Engineer jobs in Seattle, WA look for?
The top searched job categories for Cpu Rtl Design Engineer jobs in Seattle, WA are:

Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
Job description
We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role, you will join a group of hard working engineers crafting and implementing NVLink Fusion based AI infrastructure System-on-Chips. You will get a chance to create real impact in a dynamic, industry leading, technology-focused company, while working on NVLink Fusion technology.
NVLink Fusion is the enabler for the next generation of standardized rack-scale AI connectivity. What you'll be doing: As a key member of the NVLink Fusion design team, you will analyze the architectural requirements, perform the trade-off analysis for implementation, and deliver high performance, area and power efficient RTL Blocks. Craft micro-architecture specification, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean block.
Collaborate with chip architects, verification engineers, formal verification engineers, and SoC integration engineers in order to meet the goals of the block in a timely manner Identify potential IP solutions for specific use cases and assist in selecting, customizing and integrating the right IP solutions. What we need to see: Bachelors or Master's Degree, or equivalent experience in Electrical Engineering or Computer Engineering 5+ years of relevant work experience. Experience working with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, UCIE etc.
Proven track record of delivering high bandwidth datapath blocks such as data movers, protocol adaptors, network-on-chip, arbiters and schedulers etc. Deep understanding of ASIC design flows and methodology Strong analytical and interpersonal skills, excellent teammate With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us, and, due to outstanding growth, our special engineering teams are growing fast.
If you're a creative and autonomous professional with a genuine passion for technology, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.
You will also be eligible for equity and benefits. Applications for this job will be accepted at least until June 7, 2026. This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US