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Cpu Rtl Design Engineer Jobs in Seattle, WA (NOW HIRING)

Capgemini Engineering

ASIC Verification Engineer

Seattle, WA · On-site +1

$76.20K - $187.74K/yr

Maintain a strong focus on ARM IPs (CPU -- Cortex-A v9 architecture, GPU -- Mali, Debug -- CSS600 ... Work closely with other teams to gather relevant information and share design insights to improve ...

Capgemini Engineering

ASIC Verification Engineer

Seattle, WA · On-site

$76.20K - $187.74K/yr

Maintain a strong focus on ARM IPs (CPU - Cortex-A v9 architecture, GPU - Mali, Debug - CSS600 ... Work closely with other teams to gather relevant information and share design insights to improve ...

OpenAI

CPU Storage Tech Lead

Seattle, WA · On-site

$342K - $555K/yr

We design and deliver next-generation data centers optimized for dense compute clusters, advanced ... This work sits at the intersection of hardware engineering, systems architecture, and ...

Capgemini

ASIC Verification Engineer

Seattle, WA · On-site +1

$76.20K - $187.74K/yr

Maintain a strong focus on ARM IPs (CPU -- Cortex‐A v9 architecture, GPU -- Mali, Debug -- CSS600 ... Work closely with other teams to gather relevant information and share design insights to improve ...

United Airlines

ASIC Verification Engineer

Seattle, WA

$76.20K - $187.74K/yr

Maintain a strong focus on ARM IPs (CPU - CortexA v9 architecture, GPU - Mali, Debug - CSS600 ... Work closely with other teams to gather relevant information and share design insights to improve ...

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Cpu Rtl Design Engineer information

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$46.1K

$100.3K

$180.4K

How much do cpu rtl design engineer jobs pay per year?

As of May 30, 2026, the average yearly pay for cpu rtl design engineer in Seattle, WA is $100,315.00, according to ZipRecruiter salary data. Most workers in this role earn between $77,400.00 and $112,100.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are popular job titles related to Cpu Rtl Design Engineer jobs in Seattle, WA? For Cpu Rtl Design Engineer jobs in Seattle, WA, the most frequently searched job titles are:
What job categories do people searching Cpu Rtl Design Engineer jobs in Seattle, WA look for? The top searched job categories for Cpu Rtl Design Engineer jobs in Seattle, WA are:
What cities near Seattle, WA are hiring for Cpu Rtl Design Engineer jobs? Cities near Seattle, WA with the most Cpu Rtl Design Engineer job openings:
Cpu Rtl Design Engineer jobs near you
Infographic showing various Cpu Rtl Design Engineer job openings in Seattle, WA as of May 2026, with employment types broken down into 86% Full Time, and 14% Contract. Highlights an 100% In-person job distribution, with an average salary of $100,315 per year, or $48.2 per hour.
Design Verification Engineer (Silicon Engineering)

Design Verification Engineer (Silicon Engineering)

SpaceX

Redmond, WA

$140K - $175K/yr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Posted 4 days ago

SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 142 frontline employees who took The Breakroom Quiz

12th of 59 rated aerospace companies

Job description

DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) 

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. 

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.   

RESPONSIBILITIES:  

  • Responsible for digital ASIC verification at block and system level
  • Write and review test plans, develop test harnesses and test sequences
  • Develop SystemVerilog testbench infrastructure (both UVM and non-UVM) for testing designs, including DSP blocks 
  • Responsible for test plan execution, running regressions, code and functional coverage closure
  • Automate test case generation by using Python and MATLAB programs 
  • Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
  • Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering, computer science or computer engineering
  • 1+ years of experience with design verification and test bench development

PREFERRED SKILLS AND EXPERIENCE:

  • Advanced degree in electrical engineering or computer engineering
  • Experience with verification methodologies such as UVM
  • Strong object-oriented programming knowledge
  • Strong problem-solving and coding skills
  • Experience in constrained random verification
  • Expertise in developing test plans, implementing coverage models, and analyzing results
  • Experience with scripting languages, e.g. Python for automation
  • RTL design, chip bring-up, and post-silicon validation experience
  • Ability to work in a dynamic environment with changing needs and requirements

ADDITIONAL REQUIREMENTS:

  • Ability to work extended hours and weekends as needed to meet critical milestones

COMPENSATION AND BENEFITS:    
Pay range:    
Design Verification Engineer/Level I: $125,000.00 - $145,000.00/per year    
Design Verification Engineer/Level II: $140,000.00 - $175,000.00/per year    

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.

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