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Cpu Rtl Design Engineer Jobs in Dallas, TX (NOW HIRING)

As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the ... You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and ...

Physical Design Engineer

Frisco, TX · On-site

$127K - $131K/yr

This is a full time position with our company doing Physical Design Engineering. What you'll do ... Ability to collaborate across RTL, verification, and integration teams Talent101 pays referral fees.

Physical Design Engineer

Frisco, TX · On-site

$100 - $130/hr

About the role This is a full time position with our company doing Physical Design Engineering ... Ability to collaborate across RTL, verification, and integration teams Talent101 pays referral fees.

Translate customer and system requirements into optimized RTL architectures and high-quality ... Engineering, VLSI, or a related discipline * 5+ years of experience in Digital IC Design with ...

Sr. FPGA Design Engineer

Dallas, TX · On-site

$121K - $167K/yr

About the role We have are adding a Sr. FPGA Engineer to our design team that has experience taking ... RTL File is provided for enhancement * Responsible to Synthesize and implement all the logic in ...

Showing results 41-60

Cpu Rtl Design Engineer information

See Dallas, TX salary details

$40.1K

$87.2K

$156.8K

How much do cpu rtl design engineer jobs pay per year?

As of Aug 19, 2026, the average yearly pay for cpu rtl design engineer in Dallas, TX is $87,186.00, according to ZipRecruiter salary data. Most workers in this role earn between $67,300.00 and $97,400.00 per year, depending on experience, location, and employer.

What is a CPU RTL design engineer?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.

What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are popular job titles related to Cpu Rtl Design Engineer jobs in Dallas, TX?

For Cpu Rtl Design Engineer jobs in Dallas, TX, the most frequently searched job titles are:

What job categories do people searching Cpu Rtl Design Engineer jobs in Dallas, TX look for?

The top searched job categories for Cpu Rtl Design Engineer jobs in Dallas, TX are:

What cities near Dallas, TX are hiring for Cpu Rtl Design Engineer jobs?

Cities near Dallas, TX with the most Cpu Rtl Design Engineer job openings:

Infographic showing various Cpu Rtl Design Engineer job openings in Dallas, TX as of August 2026, with employment types broken down into 88% Full Time, 8% Part Time, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $87,186 per year, or $41.9 per hour.

HBM SoC Physical Design Engineer

Micron

Richardson, TX

$123K - $127K/yr

Full-time

Medical, Dental, Vision, PTO

Re-posted 27 days ago


Micron Technology rating

8.6

Company rating: 8.6 out of 10

Based on 43 frontline employees who took The Breakroom Quiz

27th of 159 rated electronics manufacturers


Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver bestinclass PPA (performance, power, area) and robust signoff collateral for tape-out. This is a handson role with opportunities to own blocks or toplevel integration across multiple product generations.

Key Responsibilities

  • Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets.
  • Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs.
  • Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHYadjacent logic) with focus on robust physical integration and timing/power integrity.
  • Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently.
  • Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule.
  • Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements.
  • Support tape-out execution (checklists, ECO flows, signoff reviews) and contribute to post-silicon debug by correlating silicon behavior with PD/STA/power analysis.
  • Identify flow gaps and improve productivity through scripting/automation and best-practice methodology development.

Required Qualifications

  • Strong experience in SoC physical design implementation from netlist to GDSII on advanced nodes and complex designs.
  • Proficiency with industry EDA tools (e.g., Cadence Innovus/Tempus, Synopsys ICC2/PrimeTime, Siemens Calibre or equivalent).
  • Solid understanding of STA fundamentals, clocking, constraints (SDC), and common closure techniques (buffering, path shaping, useful skew, etc.).
  • Experience with power intent and power delivery considerations (e.g., UPF/CPF concepts, power grid planning, power gating implications).
  • Familiarity with physical verification/signoff concepts: DRC, LVS, ERC, parasitic extraction awareness, and signoff handoff quality.

Preferred Qualifications

  • Experience with HBM / DRAM adjacent SoC designs, or memory-subsystem-heavy SoCs.
  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field.
  • Minimum 10 years of experience in a related field.
  • Proven ability to mentor and develop engineers early in their careers.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

To learn about your right to work click here.

To learn more about Micron, please visit micron.com/careers

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.

Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.


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