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Cpu Rtl Design Engineer Jobs in Houston, TX (NOW HIRING)

Enable dynamic memory allocation across GPU, CPU, and NPU * Optimize iGPU performance for AI ... Preferred Certifications NA Knowledge & Skills Memory/GPU design Computer Engineering Computer ...

Hypervisor Engineer

Spring, TX · On-site

$105K - $161K/yr

Design and implement all aspects of system level software such VMM/hypervisors, operating systems ... Experience in building CPU instructions emulators * Hands-on experience developing PC platform ...

Experience with DevOps methodologies and platforms (OpenStack, Kubernetes, CI/CD, etc.). * Experience in cloud administration, virtualization, and hardware/platform design considerations (Storage/CPU ...

Experience with DevOps methodologies and platforms (OpenStack, Kubernetes, CI/CD, etc.). * Experience in cloud administration, virtualization, and hardware/platform design considerations (Storage/CPU ...

... and CPU architectures, this position requires a deep understanding of computational science ... You will participate in design discussions, development, and deployment in large-scale ...

... and CPU architectures, this position requires a deep understanding of computational science ... You will participate in design discussions, development, and deployment in large-scale ...

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Showing results 1-20

Cpu Rtl Design Engineer information

See Houston, TX salary details

$38.7K

$84.2K

$151.4K

How much do cpu rtl design engineer jobs pay per year?

As of Aug 4, 2026, the average yearly pay for cpu rtl design engineer in Houston, TX is $84,180.00, according to ZipRecruiter salary data. Most workers in this role earn between $64,900.00 and $94,100.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What is a CPU RTL design engineer?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Houston, TX? For Cpu Rtl Design Engineer jobs in Houston, TX, the most frequently searched job titles are:
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What cities near Houston, TX are hiring for Cpu Rtl Design Engineer jobs? Cities near Houston, TX with the most Cpu Rtl Design Engineer job openings:
Infographic showing various Cpu Rtl Design Engineer job openings in Houston, TX as of July 2026, with employment types broken down into 17% As Needed, 74% Full Time, 4% Part Time, 4% Contract, and 1% Summer. Highlights an 89% Physical, 5% Hybrid, and 6% Remote job distribution, with an average salary of $84,180 per year, or $40.5 per hour.

DevOps / Platform Engineer (AWS, Terraform, Python, HPC)

EPAM Systems

Houston, TX • On-site

$50.25 - $69/hr

Other

Re-posted 29 days ago


Job description

We are seeking an experienced DevOps / Platform Engineer with deep expertise in AWS services, Terraform, Python, and HPC infrastructure. This role will work closely with the Chief Geologist on high-impact projects that directly affect our business and customers. Work Schedule: On-site Tuesday - Thursday. Req# Responsibilities Design, implement and manage secure scalable AWS environments with focus on security, networking and cloud operations Automate workflows with Python, PowerShell and Bash Manage S3 buckets, with knowledge of limits and cross-account access Implement and optimize parallel computing solutions with autoscaling groups, AWS Batch and both CPU and GPU compute resources Set up monitors and logs for job runs, service utilization, EC2 usage, durations and costs Develop infrastructure as code with Terraform, CloudFormation and AWS CDK Work with AWS Aurora for PostgreSQL, with the ability to write and optimize SQL queries Build and manage Docker containers and ECR repositories, with the ability to create images from scratch Utilize AWS CodeBuild and have a working knowledge of Azure DevOps Requirements Strong hands-on experience with AWS services and Terraform Proficiency in Python; experience with PowerShell and Bash scripts Experience with HPC infrastructure and parallelization (CPU/GPU compute) Solid understanding of cloud security, networking and operations best practices Experience with infrastructure as code and containerization Familiarity with monitors, logs and cost management in AWS Experience with databases (especially AWS Aurora for PostgreSQL) and SQL Knowledge of Azure DevOps is a plus Nice to have Excellent communication and critical thinking skills; proactive and accountable Able to work independently with minimal supervision Skilled at gathering user requirements, building documentation and translating needs into technical solutions High service orientation, understands user constraints, collaborates with internal teams (cloud ops, cyber, netsec) and proactively participates in change review meetings Resourceful in navigation of internal processes and building relationships within the organization Capable of advising on and building future solutions, from ideation to implementation