The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...
The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...
Digital Design RTL Engineer
Fort Collins, CO · On-site
$134K/yr
The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...
Digital Design RTL Engineer
Fort Collins, CO · On-site
$134K/yr
The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...
Digital Design RTL Engineer
Fort Collins, CO · On-site
$121.90 - $195/hr
## Digital Design RTL EngineerApplylocations: USA-Colorado-Fort Collins-4380 Ziegler Road: USA-CA San Jose Innovation Drivetime type: Full timeposted on: Posted Todayjob requisition id: R026324**Please ...
Digital Design RTL Engineer
Fort Collins, CO · On-site
$121.90 - $195/hr
## Digital Design RTL EngineerApplylocations: USA-Colorado-Fort Collins-4380 Ziegler Road: USA-CA San Jose Innovation Drivetime type: Full timeposted on: Posted Todayjob requisition id: R026324**Please ...
Digital Design RTL Engineer
Fort Collins, CO · On-site
$134K/yr
The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...
Digital Design RTL Engineer
Fort Collins, CO · On-site
$134K/yr
The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...
Digital Design RTL Engineer
Fort Collins, CO · On-site
$134K/yr
The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...
Digital Design RTL Engineer
Fort Collins, CO · On-site
$134K/yr
The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...
ASIC & FPGA Design Engineer Sr - E3
Denver, CO · On-site
$110K - $204K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Sr - E3
Denver, CO · On-site
$110K - $204K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Sr - E3
Littleton, CO · On-site
$110K - $204K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Sr - E3
Littleton, CO · On-site
$110K - $204K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
Design Verification Engineer
Broomfield, CO · On-site
$108 - $172.80/hr
Design Verification Engineer Broadcom's ASIC Products Division (APD) is looking for an experienced ... Ensure knowledge of RTL, gate-level netlists, SDF, and debug such formats. Qualifications * 6+ ...
Design Verification Engineer
Broomfield, CO · On-site
$108 - $172.80/hr
Design Verification Engineer Broadcom's ASIC Products Division (APD) is looking for an experienced ... Ensure knowledge of RTL, gate-level netlists, SDF, and debug such formats. Qualifications * 6+ ...
Lead Verification Design Engineer - Denver, CO - ZR_88_JOB
Denver, CO · On-site
$140K - $170K/yr
Our services include customer specific design assistance, design flow, RTL-to-GDSII implementation ... ASIC and FPGA devices. Armed with verification experience and applying industry leading methods ...
Lead Verification Design Engineer - Denver, CO - ZR_88_JOB
Denver, CO · On-site
$140K - $170K/yr
Our services include customer specific design assistance, design flow, RTL-to-GDSII implementation ... ASIC and FPGA devices. Armed with verification experience and applying industry leading methods ...
Design Verification Engineer
Broomfield, CO · On-site
$144 - $230/hr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...
Design Verification Engineer
Broomfield, CO · On-site
$144 - $230/hr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...
Physical Design Engineer
Colorado Springs, CO · On-site
$129.40 - $207/hr
Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no remote work allowed. Required Attributes * TCL/PERL Scripting Proficiency * Proficiency in related ...
Physical Design Engineer
Colorado Springs, CO · On-site
$129.40 - $207/hr
Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no remote work allowed. Required Attributes * TCL/PERL Scripting Proficiency * Proficiency in related ...
ASIC & FPGA Design Engineer Stf - E4
Littleton, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
ASIC & FPGA Design Engineer Stf - E4
Littleton, CO · On-site
$135K - $251K/yr
Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and ...
Design Verification Engineer
$137K - $167K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...
Design Verification Engineer
$137K - $167K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...
Design Verification Engineer
Broomfield, CO · On-site
$137K - $167K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...
Design Verification Engineer
Broomfield, CO · On-site
$137K - $167K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...
Design Verification Engineer
$134K - $164K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...
Design Verification Engineer
$134K - $164K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...
Physical Design Engineer
$134K - $138K/yr
Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...
Physical Design Engineer
$134K - $138K/yr
Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...
Physical Design Engineer
$134K - $138K/yr
Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...
Physical Design Engineer
$134K - $138K/yr
Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...
Sr. Silicon Design Engineer
Fort Collins, CO · On-site
$106K/yr
Oversee definition, design, verification, and/or documentation for ASIC development. Determine ... Apply knowledge of engineering principles, best practices, and technologies to the design ...
Sr. Silicon Design Engineer
Fort Collins, CO · On-site
$106K/yr
Oversee definition, design, verification, and/or documentation for ASIC development. Determine ... Apply knowledge of engineering principles, best practices, and technologies to the design ...
Oversee definition, design, verification, and/or documentation for ASIC development. Determine ... Apply knowledge of engineering principles, best practices, and technologies to the design ...
Oversee definition, design, verification, and/or documentation for ASIC development. Determine ... Apply knowledge of engineering principles, best practices, and technologies to the design ...
FPGA Design Engineer
Littleton, CO · On-site
$100/hr
Job #216852 Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...
FPGA Design Engineer
Littleton, CO · On-site
$100/hr
Job #216852 Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...
Contractual Asic Rtl Design Engineer information
What is the difference between Contractual Asic Rtl Design Engineer vs Digital IC Design Engineer?
| Aspect | Contractual Asic Rtl Design Engineer | Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering | Bachelor's/Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Contract-based, project-specific, often in semiconductor or tech companies | Full-time or contract, working on digital integrated circuit design |
| Industry Usage | Common in semiconductor, electronics, and tech firms for ASIC development | Used across semiconductor, consumer electronics, and communication industries |
Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Colorado?
The most popular types of Asic Rtl Design Engineer jobs in Colorado are:
What are popular job titles related to Contractual Asic Rtl Design Engineer jobs in Colorado?
For Contractual Asic Rtl Design Engineer jobs in Colorado, the most frequently searched job titles are:
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$134K/yr
Full-time
Medical, Dental, Vision, Retirement, PTO
Re-posted 10 days ago
Broadcom rating
8.7
Based on 23 frontline employees who took The Breakroom Quiz
19th of 159 rated electronics manufacturers
Job description
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Job Description:The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical execution, you will collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule.
Responsibilities include:
Operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off
Collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule
High proficiency in SystemVerilog
Proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques.
Experience:
BSEE required, MSEE/PHD preferred
8+ years of industry experience with a focus on SoC integration, LPDDR5/6, DDR4/5 and/or high-speed SerDes, or HBM protocols is highly preferred.
Compensation and Benefits
The annual base salary range for this position is USD 121,900.00 To USD 195,000.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
About Broadcom
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
10,000+ Employees
Headquarters location
Palo Alto, CA, US
Year founded
1991